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公开(公告)号：US09785222B2
公开(公告)日：2017-10-10
申请号：US14579899
申请日：2014-12-22
Applicant: QUALCOMM Incorporated
Inventor： James Thomas Doyle , Zhengming Fu , Farsheed Mahmoudi , Amirali Shayan Arani , Nazanin Darbanian
CPC classification number: G06F1/3287 , G05F1/575 , G06F1/3296 , H02M2001/0045 , H02M2003/1566
Abstract: Operational mode changes in a system-on-a-chip (SoC) integrated circuit in a complex device such as a mobile phone cause spikes in current demand which can cause voltage droops that disrupt operation of the SoC. A hybrid parallel power supply connects a switching-mode power supply and a low-dropout voltage regulator in parallel to provide high efficiency and fast response times. Integration of the voltage regulator on the SoC reduces parasitic impedance be between the voltage regulator and the load to aid in reducing voltage droops. The switching-mode power supply and the low-dropout voltage regulator can regulate their outputs to slightly difference voltage levels. This can allow the switching-mode power supply to supply most of the SoC's current demands.
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2.发明申请Circuits and Methods Providing Three-Level Signals At A Synchronous Buck Converter 有权在同步降压转换器中提供三电平信号的电路和方法公开(公告)号：US20160380543A1
公开(公告)日：2016-12-29
申请号：US15248267
申请日：2016-08-26
Applicant: QUALCOMM Incorporated
Inventor： Chuang Zhang , James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
CPC classification number: H02M3/158 , H02M1/14 , H02M7/483 , H02M2003/072
Abstract: A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.
Abstract translation: 一种电路，包括：三电平降压转换器，具有：多个输入开关和电感器，被配置为从所述多个输入开关接收电压，所述多个输入开关与第一电容器耦合并且被配置为对所述第一电容器进行充电和放电 电容器 在降压转换器的输出处的第二电容器; 以及在所述电感器的输入节点处的开关电容器，其中所述开关电容器小于所述第一电容器或所述第二电容器。
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3.发明申请CIRCUITS AND METHODS PROVIDING THREE-LEVEL SIGNALS AT A SYNCHRONOUS BUCK CONVERTER 有权在同步转换器上提供三级信号的电路和方法公开(公告)号：US20160118886A1
公开(公告)日：2016-04-28
申请号：US14630318
申请日：2015-02-24
Applicant: QUALCOMM Incorporated
Inventor： Chuang Zhang , James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
IPC: H02M3/158
CPC classification number: H02M3/158 , H02M1/14 , H02M7/483 , H02M2003/072
Abstract: A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.
Abstract translation: 一种电路，包括：三电平降压转换器，具有：多个输入开关和电感器，被配置为从所述多个输入开关接收电压，所述多个输入开关与第一电容器耦合并且被配置为对所述第一电容器进行充电和放电 电容器 在降压转换器的输出处的第二电容器; 以及在所述电感器的输入节点处的开关电容器，其中所述开关电容器小于所述第一电容器或所述第二电容器。
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公开(公告)号：US10115661B2
公开(公告)日：2018-10-30
申请号：US13791388
申请日：2013-03-08
Applicant: QUALCOMM Incorporated
Inventor： James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
Abstract: Some novel features pertain to an inductor structure that includes a first inductor winding, a second inductor winding and a filler. The first inductor winding includes an electrically conductive material. The second inductor winding includes an electrically conductive material. The filler is laterally located between the first inductor winding and the second inductor winding. The filler is configured to provide structural coupling of the first and second inductor windings. In some implementations, the first inductor winding is laterally co-planar to the second inductor winding. In some implementations, the first inductor winding has a first spiral shape and the second inductor winding has a second spiral shape. In some implementations, the first inductor winding and the second inductor winding have an elongated circular shape. In some implementations, the filler is an epoxy.
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公开(公告)号：US09793804B2
公开(公告)日：2017-10-17
申请号：US14630362
申请日：2015-02-24
Applicant: QUALCOMM Incorporated
Inventor： Chuang Zhang , James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
CPC classification number: H02M3/158 , H02M1/126 , H02M3/07 , H02M7/483 , H02M2003/072
Abstract: A circuit including: a control system for a three-level buck converter, the three-level buck converter including multiple input switches, each of the input switches receiving one of a plurality of different pulse width modulated signals, the control system including: a first clock signal and a second clock signal, the second clock signal being a phase-shifted version of the first clock signal; ramp generating circuitry receiving the first and second clock signals and producing first and second ramp signals, respectively, from the first and second clock signals; a first comparing circuit receiving the first ramp signal and producing a first one of the pulse width modulated signals therefrom; and a second comparing circuit receiving the second ramp signal and producing a second one of the pulse width modulated signals therefrom.
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Patent Agency Ranking
6.发明授权Circuits and methods providing three-level signals at a synchronous buck converter 有权在同步降压转换器中提供三电平信号的电路和方法公开(公告)号：US09450491B2
公开(公告)日：2016-09-20
申请号：US14630318
申请日：2015-02-24
Applicant: QUALCOMM Incorporated
Inventor： Chuang Zhang , James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
CPC classification number: H02M3/158 , H02M1/14 , H02M7/483 , H02M2003/072
Abstract: A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.
Abstract translation: 一种电路，包括：三电平降压转换器，具有：多个输入开关和电感器，被配置为从所述多个输入开关接收电压，所述多个输入开关与第一电容器耦合并且被配置为对所述第一电容器进行充电和放电 电容器 在降压转换器的输出处的第二电容器; 以及在所述电感器的输入节点处的开关电容器，其中所述开关电容器小于所述第一电容器或所述第二电容器。
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公开(公告)号：US20140225700A1
公开(公告)日：2014-08-14
申请号：US13791388
申请日：2013-03-08
Applicant: QUALCOMM INCORPORATED
Inventor： James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
CPC classification number: H01L23/49822 , H01F17/0006 , H01L23/645 , H01L25/105 , H01L28/10 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2225/06562 , H01L2225/1023 , H01L2225/1058 , H01L2924/15313 , H01L2924/15331 , H01L2924/19106 , Y10T29/4902 , H01L2924/00
Abstract: Some novel features pertain to an inductor structure that includes a first inductor winding, a second inductor winding and a filler. The first inductor winding includes an electrically conductive material. The second inductor winding includes an electrically conductive material. The filler is laterally located between the first inductor winding and the second inductor winding. The filler is configured to provide structural coupling of the first and second inductor windings. In some implementations, the first inductor winding is laterally co-planar to the second inductor winding. In some implementations, the first inductor winding has a first spiral shape and the second inductor winding has a second spiral shape. In some implementations, the first inductor winding and the second inductor winding have an elongated circular shape. In some implementations, the filler is an epoxy.
Abstract translation: 一些新颖的特征涉及一种电感器结构，其包括第一电感器绕组，第二电感器绕组和填充器。 第一电感器绕组包括导电材料。 第二电感线圈包括导电材料。 填料侧向位于第一电感器绕组和第二电感器绕组之间。 填充物被配置为提供第一和第二电感器绕组的结构耦合。 在一些实施方案中，第一电感器绕组与第二电感器绕组横向共面。 在一些实施方案中，第一电感器绕组具有第一螺旋形状并且第二电感器绕组具有第二螺旋形状。 在一些实施方案中，第一电感器绕组和第二电感器绕组具有细长的圆形形状。 在一些实施方案中，填料是环氧树脂。
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公开(公告)号：US09843259B2
公开(公告)日：2017-12-12
申请号：US15248267
申请日：2016-08-26
Applicant: QUALCOMM Incorporated
Inventor： Chuang Zhang , James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
CPC classification number: H02M3/158 , H02M1/14 , H02M7/483 , H02M2003/072
Abstract: A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.
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9.发明申请HYBRID PARALLEL REGULATOR AND POWER SUPPLY COMBINATION FOR IMPROVED EFFICIENCY AND DROOP RESPONSE WITH DIRECT CURRENT DRIVEN OUTPUT STAGE ATTACHED DIRECTLY TO THE LOAD 有权混合并联稳压器和电源组合，用于直接连接到负载的直接电流驱动输出级的改进效率和响应公开(公告)号：US20160179181A1
公开(公告)日：2016-06-23
申请号：US14579899
申请日：2014-12-22
Applicant: QUALCOMM INCORPORATED
Inventor： James Thomas Doyle , Zhengming Fu , Farsheed Mahmoudi , Amirali Shayan Arani , Nazanin Darbanian
IPC: G06F1/32
CPC classification number: G06F1/3287 , G05F1/575 , G06F1/3296 , H02M2001/0045 , H02M2003/1566
Abstract: Operational mode changes in a system-on-a-chip (SoC) integrated circuit in a complex device such as a mobile phone cause spikes in current demand which can cause voltage droops that disrupt operation of the SoC. A hybrid parallel power supply connects a switching-mode power supply and a low-dropout voltage regulator in parallel to provide high efficiency and fast response times. Integration of the voltage regulator on the SoC reduces parasitic impedance be between the voltage regulator and the load to aid in reducing voltage droops. The switching-mode power supply and the low-dropout voltage regulator can regulate their outputs to slightly difference voltage levels. This can allow the switching-mode power supply to supply most of the SoC's current demands.
Abstract translation: 诸如移动电话等复杂设备的片上系统芯片（SoC）集成电路的运行模式变化会导致电流需求的尖峰，从而导致电压下降，从而破坏了SoC的运行。 混合并联电源并联连接开关电源和低压差稳压器，以提供高效率和快速的响应时间。 电压调节器在SoC上的集成可减少电压调节器和负载之间的寄生阻抗，有助于降低电压下降。 开关电源和低压差稳压器可以将其输出调节为稍微不同的电压电平。 这可以允许开关电源供应大部分SoC的当前需求。
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公开(公告)号：US20160118887A1
公开(公告)日：2016-04-28
申请号：US14630362
申请日：2015-02-24
Applicant: QUALCOMM Incorporated
Inventor： Chuang Zhang , James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
IPC: H02M3/158
CPC classification number: H02M3/158 , H02M1/126 , H02M3/07 , H02M7/483 , H02M2003/072
Abstract: A circuit including: a control system for a three-level buck converter, the three-level buck converter including multiple input switches, each of the input switches receiving one of a plurality of different pulse width modulated signals, the control system including: a first clock signal and a second clock signal, the second clock signal being a phase-shifted version of the first clock signal; ramp generating circuitry receiving the first and second clock signals and producing first and second ramp signals, respectively, from the first and second clock signals; a first comparing circuit receiving the first ramp signal and producing a first one of the pulse width modulated signals therefrom; and a second comparing circuit receiving the second ramp signal and producing a second one of the pulse width modulated signals therefrom.
Abstract translation: 一种电路，包括：用于三电平降压转换器的控制系统，所述三电平降压转换器包括多个输入开关，每个输入开关接收多个不同的脉宽调制信号中的一个，所述控制系统包括：第一 时钟信号和第二时钟信号，所述第二时钟信号是所述第一时钟信号的相移版本; 斜坡发生电路接收第一和第二时钟信号并分别从第一和第二时钟信号产生第一和第二斜坡信号; 接收所述第一斜坡信号并从其产生所述脉冲宽度调制信号中的第一个信号的第一比较电路; 以及第二比较电路，接收所述第二斜坡信号并从其产生所述脉冲宽度调制信号中的第二个。
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