公开(公告)号：US4509020A

公开(公告)日：1985-04-02

申请号：US529892

申请日：1983-09-07

Applicant: Rudy J. van de Plassche ,  Eise C. Dijkmans

Inventor： Rudy J. van de Plassche ,  Eise C. Dijkmans

IPC: H03F3/20 ,  H03F3/30 ,  H03F3/26

CPC classification number: H03F3/3088

Abstract: For a satisfactory cross-over behavior of the transistors T.sub.1 and T.sub.2 of push-pull amplifier comprising an input 2 and an output 3, it is necessary that the sum of the base-emitter voltages of the transistors T.sub.1 and T.sub.2 remains substantially constant. For this purpose a first voltage-current converter 5 is coupled between the base and the emitter of transistor T.sub.1, the inverting input of this converter being coupled to the base of transistor T.sub.1 via a first reference-voltage source 8 and the non-inverting input to the emitter of transistor T.sub.1. Similarly, a second voltage-current converter 9 and a second reference-voltage source 12 are arranged between the base and the emitter of transistor T.sub.2. The output currents of the first and the second voltage-current converters 5 and 9 are compared with each other in the combining circuit 14 which drives the control amplifier 15, which in its turn controls the base-emitter voltage of transistor T.sub.2 in such a way that the sum of the base-emitter voltages of transistor T.sub.1 and T.sub.2 remains constant. The push-pull amplifier exhibits a minimal amount of second-harmonic distortion, because only the difference of the errors introduced by the first and the second voltage-current converters 5 and 9 is of importance in this respect and these errors are substantially equal to each other due to the method of fabrication of the voltage-current converters.

Abstract translation: 为了使包括输入2和输出3的推挽放大器的晶体管T1和T2的令人满意的交叉行为，晶体管T1和T2的基极 - 发射极之和的总和必须保持基本恒定。 为此，第一电压 - 电流转换器5耦合在晶体管T1的基极和发射极之间，该转换器的反相输入经由第一参考电压源8和非反相输入端耦合到晶体管T1的基极 到晶体管T1的发射极。 类似地，第二电压 - 电流转换器9和第二参考电压源12被布置在晶体管T2的基极和发射极之间。 在驱动控制放大器15的组合电路14中比较第一和第二电压 - 电流转换器5和9的输出电流，控制放大器15又以这种方式控制晶体管T2的基极 - 发射极电压 晶体管T1和T2的基极 - 发射极电压之和保持恒定。 推挽放大器表现出最小量的二次谐波失真，因为仅在第一和第二电压 - 电流转换器5和9引入的误差的差异在这方面是重要的，并且这些误差基本上等于每个 其他由于电压 - 电流转换器的制造方法。

公开(公告)号：US4446419A

公开(公告)日：1984-05-01

申请号：US399170

申请日：1982-07-19

Applicant: Rudy J. van de Plassche ,  Eise C. Dijkmans ,  Hendrikus J. Schouwenaars

Inventor： Rudy J. van de Plassche ,  Eise C. Dijkmans ,  Hendrikus J. Schouwenaars

IPC: G05F1/56 ,  G05F3/30 ,  G05F3/20

CPC classification number: G05F3/30 ,  Y10S323/907

Abstract: In a known current source arrangement which generates a current whose temperature coefficient is only equal to zero at one specific temperature, steps are taken, in accordance with the invention, to render the generated current independent of the temperature over a wide temperature range by compensation of the disturbing factor in the relationship between the generated current and the temperature.

Abstract translation: 在已知的电流源装置中，其在一个特定温度下产生温度系数仅等于零的电流，根据本发明，采取步骤，通过补偿在宽的温度范围内使发电电流与温度无关 产生电流与温度之间关系的干扰因素。

公开(公告)号：US4405900A

公开(公告)日：1983-09-20

申请号：US252483

申请日：1981-04-08

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: H03F1/08 ,  H03F1/34 ,  H03F1/42 ,  H03F1/48 ,  H03F3/189 ,  H03F3/195 ,  H03F3/45

CPC classification number: H03F1/083 ,  H03F1/42 ,  H03F1/48 ,  H03F3/195

Abstract: An operational amplifier having a first amplifier stage and a second amplifier stage, which is driven by the first amplifier stage. According to the invention such an operational amplifier can be corrected for high frequencies in a very simple and effective manner by including a capacitance in parallel with the second amplifier stage between an output of the first stage and an output of the second stage which is comparatively high-ohmic relative to said output of the first stage. The second stage, which is bypassed by said capacitance, is then non-inverting for the part bypassed by said capacitance.

Abstract translation: 具有由第一放大级驱动的第一放大级和第二放大级的运算放大器。 根据本发明，通过在第一级的输出和比较高的第二级的输出之间包括与第二放大器级并联的电容，可以以非常简单和有效的方式来校正高频率的运算放大器 相对于第一级的所述输出。 由所述电容旁路的第二级对于由所述电容旁路的部分是非反相的。

公开(公告)号：US4300103A

公开(公告)日：1981-11-10

申请号：US84042

申请日：1979-10-12

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: H03F1/32 ,  H03F3/20 ,  H03F3/30

CPC classification number: H03F3/3088 ,  H03F1/3217 ,  H03F3/30

Abstract: A push-pull amplifier, having a first and a second transistor of the same conductivity type, whose collector-emitter paths are included in series between two power-supply terminals, the emitter electrode of the first transistor being connected to the collector electrode of the second transistor and to an output terminal, and the base electrode of the first transistor being connected to an input terminal, is improved in respect of its linearity, temperature dependence and bandwidth by measuring the base-emitter voltage of the first transistor with the aid of a series connection of a semiconductor junction and a resistor and by applying said voltage with opposite a.c. component to the base-emitter junction of the second transistor via a coupling circuit.

Abstract translation: 一种具有相同导电类型的第一和第二晶体管的推挽放大器，其集电极 - 射极路径串联在两个电源端子之间，第一晶体管的发射极连接到 第二晶体管和输出端子，并且第一晶体管的基极连接到输入端子，通过借助于第一晶体管的基极 - 发射极电压来测量其线性度，温度依赖性和带宽来改进 半导体结和电阻器的串联连接，并通过施加相反的交流电压 分量经由耦合电路到第二晶体管的基极 - 发射极结。

公开(公告)号：US07027790B2

公开(公告)日：2006-04-11

申请号：US09925312

申请日：2001-08-10

Applicant: Jan R. Westra ,  Rudy J. van de Plassche ,  Chi-Hung Lin

Inventor： Jan R. Westra ,  Rudy J. van de Plassche ,  Chi-Hung Lin

IPC: H04B1/06

CPC classification number: H04B1/583

Abstract: A transceiver front-end provides an interface between a transmission medium and transmitter, and between a transmission medium and receiver. The transceiver front-end includes a hybrid circuit, a high-pass filter, and a gain stage, that permits the reduction or the complete elimination of buffer amplifiers. Buffer amplifiers can be eliminated because the hybrid circuit and/or the high-pass filter are adapted so that they can be directly connected to each other, without a loss in circuit performance. Furthermore, the high-pass filter and/or the gain stage are also adapted so they can be directly connected. As such, the transceiver front-end can be constructed using all passive components, reducing or eliminating excess heat generation.

公开(公告)号：US4939517A

公开(公告)日：1990-07-03

申请号：US155403

申请日：1988-02-12

Applicant: Peter G. Baltus ,  Rudy J. van de Plassche

Inventor： Peter G. Baltus ,  Rudy J. van de Plassche

IPC: H03M1/44 ,  H03M1/00 ,  H03M1/14 ,  H03M1/36

CPC classification number: H03M1/0624 ,  H03M1/14

Abstract: An electronic circuit contains a main stage (10 and 12) that produces a digital code consisting of a plurality of bits (B.sub.1 -B.sub.M-1) that make binary transitions as a function of an input parameter (V.sub.I). A synchronization stage (14 and 16) synchronizes transitions of bits (B.sub.0 -B.sub.K-1) in one part of the code with corresponding transitions of bits (B.sub.K -B.sub.M-1) in another part. When the input parameter is in transition regions where bits in the first-mentioned part of the code could go to wrong values, the synchronization stage suitably replaces the values of bits in the first part with information based on bits in the other part.

公开(公告)号：US4816742A

公开(公告)日：1989-03-28

申请号：US156381

申请日：1988-02-16

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: G05F3/26 ,  G05F3/30 ,  G05F3/22

CPC classification number: G05F3/30 ,  Y10S323/907

Abstract: Various voltage and current sources which are substantially independent of the positive supply rail are provided, some of which are also temperature independent. The basic NPN-type transistor circuit common to all provided sources generally comprises: a cross-coupled current stabilizer having first and second cross-coupled transistors where the emitter area of the first transistor is larger than the emitter area of the second transistor, a third transistor having an emitter coupled to the collector of the second cross-coupled transistor, a fourth transistor arranged as a diode and having a base coupled to the base of the third transistor and an emitter coupled to the collector of the first transistor; a first resistor coupled between the emitter of the first cross-coupled transistor and the negative rail; a second resistor coupled between the positive rail and the collector of said third transistor; a fifth transistor having its base and emitter coupled to the base and emitter of the second cross-coupled transistor to act as a current mirror thereof; and a sixth transistor coupled between the positive rail and the collector of the fifth current mirror transistor and in cascode relationship therewith. A current source is further created by coupling the base of an additional transistor to the emitter of the fifth transistor. Additional transistors and resistors are utilized in accord with various embodiments of the invention to provide multiple current sources, and voltage and current sources which are stabilized with respect to temperature.

公开(公告)号：US4703310A

公开(公告)日：1987-10-27

申请号：US271315

申请日：1981-06-08

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: H03M1/82 ,  H03M1/00 ,  H03M1/74 ,  H03M1/66

CPC classification number: H03M1/74

Abstract: A digital-to-analog converter in accordance with the dynamic permutation principle in which a weighted series of accurate reference currents are generated by a cyclic permutation of currents which are equal to each other with a smaller degree of accuracy. The a.c. error component can then be eliminated by averaging the output signal of the converter over one full permutation cycle or an integral multiple thereof so that a signal without the error component is obtained by sampling at the end of every period. The setting of the digital-to-analog converter should not be changed during an averaging period.

Abstract translation: 根据动态置换原理的数模转换器，其中通过具有较小精度的彼此相等的电流的循环置换生成加权的一系列精确参考电流。 a.c. 然后可以通过对转换器的输出信号在一个完整的置换周期或其整数倍进行平均来消除误差分量，使得在每个周期结束时通过采样获得没有误差分量的信号。 数字模拟转换器的设置在平均周期内不应该改变。

公开(公告)号：US4616190A

公开(公告)日：1986-10-07

申请号：US771748

申请日：1985-09-03

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: H03F3/45

CPC classification number: H03F3/45071

Abstract: A steering circuit (10) in a differential amplifier having a pair of differentially arranged input amplifiers (A1 and A2) steers current from a pair of current sources (11 and 12) in such a way as to enhance slew rate without increasing offset voltage. The steering circuit is formed with a pair of steering amplifiers (A3 and A4) arranged in a differential configuration through a pair of resistors (R3 and R4).

Abstract translation: 具有一对差分布置的输入放大器（A1和A2）的差分放大器中的转向电路（10）以一对电流源（11和12）转向电流，以便增加压摆率而不增加失调电压。 转向电路由一对通过一对电阻器（R3和R4）以差分配置布置的转向放大器（A3和A4）形成。

公开(公告)号：US4573005A

公开(公告)日：1986-02-25

申请号：US573768

申请日：1984-01-25

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: H03M1/80 ,  G05F1/56 ,  G05F3/26 ,  H03M1/00 ,  H03M1/74 ,  G05F3/20

CPC classification number: G05F3/265 ,  H03M1/1057 ,  H03M1/808

Abstract: In a digital-to-analog converter (1) a plurality of binary weighted currents are generated, which currents must be in an accurate current ratio relative to each other. By means of a coupling network (15) which is controlled by a control circuit (17), a plurality of currents from said digital-to-analog converter (1) can be coupled to a precision current-mirror circuit (25) in accordance with a cyclic pattern, this allowing deviations in the ratios of the currents from the digital-to-analog converter (1) to be detected by detection means (80) which control correction means (18.2 to 18.16) by means of which the currents from the digital-to-analog converter (1) are corrected so as to reduce the detected deviations.

Abstract translation: 在数模转换器（1）中，产生多个二进制加权电流，哪些电流必须相对于彼此具有精确的电流比。 通过由控制电路（17）控制的耦合网络（15），来自所述数模转换器（1）的多个电流可以按照以下方式耦合到精密电流镜电路（25） 具有循环模式，这允许通过检测装置（80）检测来自数模转换器（1）的电流的比值的偏差，该检测装置（80）控制校正装置（18.2至18.16），通过该装置控制来自 校正数模转换器（1），以减少检测到的偏差。