公开(公告)号：US08081932B2

公开(公告)日：2011-12-20

申请号：US11400288

申请日：2006-04-10

Applicant: Jan Roelof Westra ,  Rudy J. van de Plassche ,  Chi-Hung Lin

Inventor： Jan Roelof Westra ,  Rudy J. van de Plassche ,  Chi-Hung Lin

IPC: H04B1/44

CPC classification number: H04B1/583

Abstract: A transceiver front-end provides an interface between a transmission medium and transmitter, and between a transmission medium and receiver. The transceiver front-end includes a hybrid circuit, a high-pass filter, and a gain stage, that permits the reduction or the complete elimination of buffer amplifiers. Buffer amplifiers can be eliminated because the hybrid circuit and/or the high-pass filter are adapted so that they can be directly connected to each other, without a loss in circuit performance. Furthermore, the high-pass filter and/or the gain stage are also adapted so they can be directly connected. As such, the transceiver front-end can be constructed using all passive components, reducing or eliminating excess heat generation.

Abstract translation: 收发器前端提供传输介质和发射器之间以及传输介质和接收器之间的接口。 收发器前端包括混合电路，高通滤波器和增益级，允许减少或完全消除缓冲放大器。 可以消除缓冲放大器，因为混合电路和/或高通滤波器被适配成使得它们可以彼此直接连接，而不会损失电路性能。 此外，高通滤波器和/或增益级也适于直接连接。 因此，收发器前端可以使用所有无源组件构建，从而减少或消除多余的发热。

公开(公告)号：US4831379A

公开(公告)日：1989-05-16

申请号：US96793

申请日：1987-09-14

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: H03M1/12 ,  G06G7/30 ,  H03M1/14 ,  H03M1/20 ,  H03M1/36

CPC classification number: H03M1/205 ,  G06G7/30 ,  H03M1/141

Abstract: The invention centers around a system for interpolating between multiple pairs of main complementary signals to generate further pairs of complementary signals. An input circuit (10) supplies the main signals. The interpolation is done with two strings (12) of a selected number of impedance elements (R.sub.0 -R.sub.N-1 and R.sub.NO -R.sub.NN-1). Each pair of main signals is supplied to a corresponding pair of nodes along the strings. The interpolated signals are taken from other pairs of corresponding nodes along the strings. The interpolation system is particularly suitable for use in an analog-to-digital converter of the folding type.

Abstract translation: 本发明围绕用于在多对主互补信号之间进行内插以产生另外的互补信号对的系统。 输入电路（10）提供主信号。 内插使用选定数量的阻抗元件（R0-RN-1和RNO-RNN-1）的两个串（12）完成。 每对主信号被提供给沿着串的一对相应的节点。 内插信号是沿着串的其他对相应节点取的。 插值系统特别适用于折叠型的模数转换器。

公开(公告)号：US4737766A

公开(公告)日：1988-04-12

申请号：US907349

申请日：1986-09-12

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: H03M1/12 ,  H03M1/00

CPC classification number: H03M1/368 ,  H03M1/141

Abstract: A double-ended code converter (10) contains three or more like-configured amplifiers (T.sub.O -T.sub.M+1). Each has a first flow electrode (E1), a second flow electrode (E2), and a control electrode (CE) for receiving a signal to control charge carriers moving from the first electrode to the second. The first electrodes are coupled to a circuit supply (12) which may be a current source or a voltage supply. The second electrodes are selectively coupled to one or the other of a pair of lines (L.sub.B and L.sub.BN) which are coupled to respective load elements (14.sub.B and 14.sub.BN) to provide a pair of complementary signals (V.sub.B and V.sub.BN).

Abstract translation: 双端码转换器（10）包含三个或更多个相似配置的放大器（TO-TM + 1）。 每个具有第一流动电极（E1），第二流动电极（E2）和控制电极（CE），用于接收控制从第一电极移动到第二电极的电荷载流子的信号。 第一电极耦合到可以是电流源或电压源的电路电源（12）。 第二电极被选择性地耦合到一对线（LB和LBN）中的一个或另一个，耦合到相应的负载元件（14B和14BN）以提供一对互补信号（VB和VBN）。

公开(公告)号：US4555673A

公开(公告)日：1985-11-26

申请号：US602231

申请日：1984-04-19

Applicant: Johan H. Huijsing ,  Rudy J. van de Plassche

Inventor： Johan H. Huijsing ,  Rudy J. van de Plassche

IPC: H03F3/45

CPC classification number: H03F3/45219 ,  H03F3/45085 ,  H03F3/45121 ,  H03F3/45183 ,  H03F3/4556 ,  H03F3/45708

Abstract: A differential amplifier operable between a pair of supply voltages that define a rail-to-rail supply range contains a pair of differential portions (20 and 22) that together provide representative signal amplification across the supply range, although neither differential portion individually does so. A current control (24) regulates operating currents (I.sub.N and I.sub.p) for the differential portions in such a way that the amplifier transconductance can be controlled in a desired manner as the common-mode part (V.sub.CM) of the amplifier input signal (V.sub.I+ and V.sub.I-) varies across the supply range. The transconductance is typically controlled to be largely constant. A summing circuit (26) selectively combines internal currents (I.sub.A, I.sub.B, I.sub.C, and I.sub.D) from the differential portions to generate at least one output signal (I.sub.O+ and I.sub.O-) representative of the input signal.

Abstract translation: 限定轨至轨电源范围的一对电源电压之间可操作的差分放大器包含一对差分部分（20和22），这些差分部分（20和22）在整个电源范围内提供代表性的信号放大，尽管两个差分部分都不相同。 电流控制（24）调节差分部分的工作电流（IN和Ip），使得放大器跨导可以以期望的方式被控制，作为放大器输入信号的共模部分（VCM）（VI +和 VI-）在供应范围内不同。 跨导通常被控制在很大程度上恒定。 求和电路（26）选择性地组合来自差分部分的内部电流（IA，IB，IC和ID）以产生表示输入信号的至少一个输出信号（IO +和IO-）。

公开(公告)号：US4490714A

公开(公告)日：1984-12-25

申请号：US576988

申请日：1984-02-06

Applicant: Rudy J. van de Plassche ,  Eise C. Dijkmans

Inventor： Rudy J. van de Plassche ,  Eise C. Dijkmans

IPC: H03M1/80 ,  H03M1/00 ,  H03K13/02

CPC classification number: H03M1/0607

Abstract: In a digital-to-analog converter for bipolar signals all the bits change when the signals pass through the zero level. This results in a poor signal-to-noise ratio owing the small signal and the large noise contribution by the switching transients. The invention proposes to add a digital number to or subtract it from the digital input signal as an offset. As a result of this, the switching point is shifted towards a higher amplitude, which improves the signal-to-noise ratio and the distortion in the case of digital audio signals.

Abstract translation: 在双极性信号的数模转换器中，当信号通过零电平时，所有位都会发生变化。 这导致由于小信号和由开关瞬变引起的大的噪声贡献而导致的较差的信噪比。 本发明提出将数字数字作为偏移量从数字输入信号中加或减。 结果，切换点向较高幅度移动，这提高了数字音频信号的信噪比和失真。

公开(公告)号：US4870417A

公开(公告)日：1989-09-26

申请号：US155402

申请日：1988-02-12

Applicant: Rudy J. van de Plassche ,  Peter G. Baltus

Inventor： Rudy J. van de Plassche ,  Peter G. Baltus

IPC: G06F11/08 ,  H03M1/36 ,  H03M7/16 ,  H03M13/00

CPC classification number: H03M1/0809 ,  H03M13/00 ,  H03M7/165 ,  H03M1/0646 ,  H03M1/365

Abstract: An error correction circuit employs a digital averaging technique to overcome transition bit errors in a plurality of original binary bits ideally arranged as a thermometer or circular code. The circuit first generates a like plurality of intermediate signals respectively corresponding to the original bits. Each intermediate signal varies according to a weighted analog summation of a specified odd number of consecutive original bits centered about the corresponding bit. The circuit then compares the intermediate signals with corresponding further signals to produce a corrected code.

公开(公告)号：US4587443A

公开(公告)日：1986-05-06

申请号：US644744

申请日：1984-08-27

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: G11C27/02 ,  H03K7/02

CPC classification number: G11C27/026

Abstract: A sample and hold circuit contains a pair of differential amplifiers (A1 and A2) switchably arranged in series. The circiut input signal (V.sub.IN) during sample is provided to the first amplifier (A1) which is coupled to a storage capacitor (C). The second amplifier (A2) provides the circuit output signal (V.sub.OUT) during hold. Switching circuitry (S1, S2, and S3) enables the input and output signals to undergo the same transfer function in the first amplifier. The voltage offset of the first amplifier is thereby cancelled out of the output signal, while the effect of the voltage offset of the second amplifier is reduced drastically so as to provide excellent auto-zeroing.

Abstract translation: 采样和保持电路包含一对串联可切换排列的差分放大器（A1和A2）。 采样期间的循环输入信号（VIN）被提供给耦合到存储电容器（C）的第一放大器（A1）。 第二放大器（A2）在保持期间提供电路输出信号（VOUT）。 开关电路（S1，S2和S3）使得输入和输出信号在第一放大器中经历相同的传递函数。 因此第一放大器的电压偏移从输出信号中消除，而第二放大器的电压偏移的影响急剧减小，从而提供优异的自动归零。

公开(公告)号：US4549145A

公开(公告)日：1985-10-22

申请号：US537140

申请日：1983-09-29

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: H03F3/217 ,  H03F3/20 ,  H03F3/30 ,  H03F3/72 ,  H03F1/08

CPC classification number: H03F3/3088 ,  H03F3/72

Abstract: A switching amplifier is described which is intended in particular for sample-and-hold circuits. The switching amplifier has an output stage (T.sub.1, T.sub.2) of the npn-npn-type comprising two output transistors (T.sub.1, T.sub.2) in series. The output (4) is connected to the emitter of a first one (T.sub.1) of the two output transistors (T.sub.1, T.sub.2) and to the collector of the second output transistor (T.sub.2), a diode (T.sub.3) being arranged between the output (4) and this collector. The output (4) can be switched off by switching the voltage on the base of the first transistor (T.sub.1) and the voltage on the point between the diode (T.sub.3) and the collector of the second transistor (T.sub.2) relative to the output voltage, a third transistor (T.sub.4) ensuring that in this situation the collector current of the second transistor (T.sub.2) can be drained when said diode (T.sub.3) is turned off, so that initially said second transistor (T.sub.2) can remain conductive.

Abstract translation: 描述了特别用于采样和保持电路的开关放大器。 开关放大器具有包括串联的两个输出晶体管（T1，T2）的npn-npn型的输出级（T1，T2）。 输出（4）连接到两个输出晶体管（T1，T2）的第一个（T1）的发射极，并连接到第二输出晶体管（T2）的集电极，二极管（T3）布置在输出 （4）和这个收集器。 可以通过在第一晶体管（T1）的基极上的电压和二极管（T3）与第二晶体管（T2）的集电极之间的点上的电压相对于输出电压来切换输出（4） ，第三晶体管（T4），确保在这种情况下，当所述二极管（T3）截止时，第二晶体管（T2）的集电极电流可以被排出，使得最初所述第二晶体管（T2）可以保持导通。

公开(公告)号：US4466013A

公开(公告)日：1984-08-14

申请号：US525350

申请日：1983-08-22

Applicant: Rudy J. van de Plassche ,  Eise C. Dijkmans

Inventor： Rudy J. van de Plassche ,  Eise C. Dijkmans

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/08 ,  H01L29/8605 ,  H01L27/02

CPC classification number: H01L27/0802 ,  H01L29/8605

Abstract: The invention relates to an integrated resistor formed in an epitaxial layer and provided with at least one tap. In order to reduce field effect action between the resistor and the epitaxial layer, the voltage on the two ends of the epitaxial layer underneath the resistor tracks the voltage on the two ends of the resistor. Moreover, the epitaxial layer is short-circuited by means of buried layers at the locations where the resistance layer also exhibits a short-circuit, such as underneath the contact area of the tap.

Abstract translation: 本发明涉及一种形成在外延层中并具有至少一个分接头的集成电阻器。 为了减小电阻和外延层之间的场效应，电阻下方的外延层两端的电压跟踪电阻两端的电压。 此外，外延层通过掩埋层在电阻层也表现出短路的位置（例如在接头的接触区域下方）短路。

公开(公告)号：US4290025A

公开(公告)日：1981-09-15

申请号：US15547

申请日：1979-02-26

Applicant: Rudy J. van de Plassche

Inventor： Rudy J. van de Plassche

IPC: H03G3/12 ,  H03G1/00 ,  H03G3/00 ,  H03F3/45 ,  H03G3/30

CPC classification number: H03G1/0017 ,  H03G1/0023 ,  H03G3/00

Abstract: An amplifier arrangement with a variable gain factor comprising a first and a second emitter-coupled transistor and a third and a fourth emitter-coupled transistor. The collector electrodes of the first and third transistor are coupled to an output of the amplifier arrangement. Between the interconnected base electrodes of the first and the fourth transistor and the interconnected base electrodes of the second and the third transistor a control signal can be applied. A signal current is applied to the interconnected emitter electrodes of the first and the second transistor and to the interconnected emitter electrodes of the third and the fourth transistor by means of a first and a second voltage-current converter, respectively, at least one of the two converters comprising a signal input and both converters having negative feedback to the output of the amplifier arrangement.

Abstract translation: 具有可变增益因子的放大器装置，包括第一和第二发射极耦合晶体管以及第三和第四发射极耦合晶体管。 第一和第三晶体管的集电极耦合到放大器装置的输出端。 在第一和第四晶体管的互连基极与第二晶体管和第三晶体管的互连基极之间可以施加控制信号。 分别通过第一和第二电压 - 电流转换器将信号电流施加到第一和第二晶体管的互连发射极电极和第三和第四晶体管的互连的发射极，至少一个 两个转换器包括信号输入和两个转换器，其具有对放大器装置的输出的负反馈。