公开(公告)号：US10797042B2

公开(公告)日：2020-10-06

申请号：US16438026

申请日：2019-06-11

Applicant: SOCIONEXT INC.

Inventor： Wenzhen Wang ,  Hirotaka Takeno ,  Atsushi Okamoto

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L27/02 ,  H01L27/092 ,  H01L29/06 ,  H01L23/528 ,  H01L29/78 ,  H01L23/522

Abstract: A semiconductor device includes a semiconductor substrate, a first standard cell including a first active region and a second active region, and a power switching circuit including a first switching transistor electrically connected between a first interconnect and a second interconnect over the semiconductor substrate, and including a first buffer connected to a gate of the first switching transistor, the first buffer including a third active region and a fourth active region, and wherein the first buffer adjoins, in a plan view, the first standard cell in a first direction, wherein an arrangement of the first active region matches an arrangement of the third active region in a second direction different from the first direction, and wherein an arrangement of the second active region matches an arrangement of the fourth active region in the second direction.

公开(公告)号：US10693457B2

公开(公告)日：2020-06-23

申请号：US16206874

申请日：2018-11-30

Applicant: SOCIONEXT INC.

Inventor： Atsushi Okamoto ,  Tomoyasu Kitaura ,  Hirotaka Takeno

IPC: H03K17/60 ,  H03K17/687 ,  H03K17/16 ,  H03K17/12 ,  H03K19/00 ,  G06F1/26 ,  H01L27/118 ,  H01L27/02

Abstract: Power switch cells (20) respectively includes power switches (21), each of which is capable of performing switching between electrical connection and disconnection between a global power supply line (11) and a local power supply line (8) in accordance with a control signal (CTR). The power switches (21) are connected in a chain state to constitute a chain connection through which the control signal (CTR) is sequentially transmitted. A starting point switch (21a) in the chain connection has a greater distance to an edge (BE) of a region occupied by a power domain than an ending point switch (21b).

公开(公告)号：US10483255B2

公开(公告)日：2019-11-19

申请号：US16448241

申请日：2019-06-21

Applicant: Socionext Inc.

Inventor： Hirotaka Takeno ,  Atsushi Okamoto

IPC: H01L27/02 ,  H01L23/528 ,  H01L29/10 ,  H03K17/16 ,  H01L29/08 ,  H01L27/118 ,  H01L27/092 ,  H03K19/00 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/06 ,  H01L27/12 ,  H01L29/78

Abstract: A semiconductor device includes a first circuit, a second circuit, a first power supply line, a second power supply line coupled to the first circuit, a third power supply line, a fourth power supply line coupled to the second circuit, a first switch circuit including a first switch transistor and a well tap, the first switch transistor including one source or drain end coupled to the first power supply line and another source or drain end coupled to the second power supply line, the well tap being electrically coupled to the second power supply line, and a second switch circuit including a second switch transistor including one source or drain end coupled to the third power supply line and another source or drain end coupled to the fourth power supply line, the second switch circuit including no well tap electrically coupled to the fourth power supply line.

公开(公告)号：US10373943B2

公开(公告)日：2019-08-06

申请号：US15953899

申请日：2018-04-16

Applicant: Socionext Inc.

Inventor： Hirotaka Takeno ,  Atsushi Okamoto

IPC: H01L27/02 ,  H01L29/08 ,  H01L29/10 ,  H01L23/528 ,  H03K17/16 ,  H01L27/088 ,  H03K19/00 ,  H01L27/118 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L27/12 ,  H01L29/78

Abstract: A semiconductor device includes a first circuit, a second circuit, a first power supply line, a second power supply line coupled to the first circuit, a third power supply line, a fourth power supply line coupled to the second circuit, a first switch circuit including a first switch transistor and a well tap, the first switch transistor including one source or drain end coupled to the first power supply line and another source or drain end coupled to the second power supply line, the well tap being electrically coupled to the second power supply line, and a second switch circuit including a second switch transistor including one source or drain end coupled to the third power supply line and another source or drain end coupled to the fourth power supply line, the second switch circuit including no well tap electrically coupled to the fourth power supply line.