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公开(公告)号:US09972190B2
公开(公告)日:2018-05-15
申请号:US15139500
申请日:2016-04-27
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Stephane Monfray , Christophe Maitre , Thomas Skotnicki
CPC classification number: G08B21/182 , G01D21/00 , G01K1/024 , G01K5/72 , G01P15/02 , H01L41/113 , H02N2/18
Abstract: A detector of an event includes an electrical energy generator formed by a flexible piezoelectric element with a weight fastened to the flexible piezoelectric element that is biased with the weight in a position with the piezoelectric element flexed. In response to detection of the event, a trigger releases the weight so as to cause a vibration of the piezoelectric element. This vibration is converted by the flexible piezoelectric element into electrical energy. An electronic system is power by the electrical energy and is operable to generate an electrical signal indicative of the detected event.
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公开(公告)号:US09966879B2
公开(公告)日:2018-05-08
申请号:US15653835
申请日:2017-07-19
Applicant: Commissariat a l'Energie Atomique et aux Energies Alternatives , STMicroelectronics (Crolles 2) SAS
Inventor: Stephane Monfray , Guillaume Savelli , Thomas Skotnicki , Philippe Coronel , Frederic Gaillard
Abstract: A system includes a hot source, a cold source, and a device thermally coupled between the hot source and the cold source. The device includes a thermal-mechanical transducer and a mechanical-electrical transducer. The thermal-mechanical transducer includes a band of bimetallic strips linked mechanically together by their longitudinal ends. The band partially suspended over a portion of a substrate. Each bimetallic strip has a first stable state having a first curvature and a second stable state having a second curvature opposite the first curvature, and adjacent bimetallic strips have opposite curvature.
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公开(公告)号:US20170117823A1
公开(公告)日:2017-04-27
申请号:US15139151
申请日:2016-04-26
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Arthur Arnaud , Jihane Boughaleb , Stephane Monfray , Thomas Skotnicki
IPC: H02N2/18 , F03G7/06 , H01L41/113
CPC classification number: H02N2/18 , F03G7/06 , H01L41/1134 , H02N3/00
Abstract: A system for converting thermal energy into electrical power includes a temperature-sensitive element held in a frame by its two ends between a heat source and a cold source producing a thermal gradient. A piezoelectric element is positioned between the frame and at least one end of the temperature-sensitive element. The temperature-sensitive element is configured to deform cyclically between two states under the action of the thermal gradient. With each cyclic deformation, a stress is applied to the piezoelectric element via the one end.
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公开(公告)号:US11822164B2
公开(公告)日:2023-11-21
申请号:US17009468
申请日:2020-09-01
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Stephane Monfray
IPC: G02F1/025
CPC classification number: G02F1/025 , G02F2202/06 , G02F2202/104 , G02F2202/105 , G02F2203/50
Abstract: An electro-optical phase modulator includes a waveguide made from a stack of strips. The stack includes a first strip made of a doped semiconductor material of a first conductivity type, a second strip made of a conductive material or of a doped semiconductor material of a second conductivity type, and a third strip made of a doped semiconductor material of the first conductivity type. The second strip is separated from the first strip by a first interface layer made of a dielectric material, and the third strip is separated from the second strip by a second interface layer made of a dielectric material.
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公开(公告)号:US10741740B2
公开(公告)日:2020-08-11
申请号:US16047505
申请日:2018-07-27
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Emmanuel Dubois , Jean-Francois Robillard , Stephane Monfray , Thomas Skotnicki
Abstract: A thermo-electric generator includes a semiconductor membrane with a phononic structure containing at least one P-N junction. The membrane is suspended between a first support designed to be coupled to a cold thermal source and a second support designed to be coupled to a hot thermal source. The structure for suspending the membrane has an architecture allowing the heat flux to be redistributed within the plane of the membrane.
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公开(公告)号:US20190265519A1
公开(公告)日:2019-08-29
申请号:US16254798
申请日:2019-01-23
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Stephane Monfray , Frédéric Boeuf
IPC: G02F1/025
Abstract: A photonic device includes a first region having a first doping type, and a second region having a second doping type, where the first region and the second region contact to form a vertical PN junction. The first region includes a silicon germanium (SiGe) region having a gradual germanium concentration.
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公开(公告)号:US10075102B2
公开(公告)日:2018-09-11
申请号:US15139151
申请日:2016-04-26
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Arthur Arnaud , Jihane Boughaleb , Stephane Monfray , Thomas Skotnicki
IPC: H01L41/113 , H02N2/18 , H02N3/00 , F03G7/06
CPC classification number: H02N2/18 , F03G7/06 , H01L41/1134 , H02N3/00
Abstract: A system for converting thermal energy into electrical power includes a temperature-sensitive element held in a frame by its two ends between a heat source and a cold source producing a thermal gradient. A piezoelectric element is positioned between the frame and at least one end of the temperature-sensitive element. The temperature-sensitive element is configured to deform cyclically between two states under the action of the thermal gradient. With each cyclic deformation, a stress is applied to the piezoelectric element via the one end.
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公开(公告)号:US20170248543A1
公开(公告)日:2017-08-31
申请号:US15251009
申请日:2016-08-30
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Stephane Monfray , Gaspard Hiblot
IPC: G01N27/414 , H01L27/12 , H01L29/788 , H01L27/06 , H01L29/423
CPC classification number: H01L27/0722 , G01N27/414 , G01N27/4145 , G01N33/49 , G01R19/16519 , H01L27/0623 , H01L27/0705 , H01L27/1207 , H01L29/42356
Abstract: An integrated electronic detector operates to detecting a variation in potential on an input terminal. The detector includes a MOS transistor having a drain forming an output. Variation in drain current is representative of the variation in potential. A bipolar transistor has a base forming the input terminal and a collector electrically connected to the gate of the MOS transistor. The detector has a first configuration in which the bipolar transistor is conducting and the MOS transistor is turned off. The detector has a second configuration in which the bipolar transistor is turned off and the MOS transistor is in a sub-threshold operation. Transition of the detector from the first configuration to the second configuration occurs in response to the variation in potential.
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公开(公告)号:US09601382B2
公开(公告)日:2017-03-21
申请号:US14940325
申请日:2015-11-13
Inventor: Stephane Monfray , Ronald K. Sampson , Nicolas Loubet
IPC: H01L21/336 , H01L21/8234 , H01L29/78 , H01L29/66 , H01L21/02 , H01L21/84 , H01L29/10 , H01L29/165 , H01L29/06
CPC classification number: H01L21/823431 , H01L21/02164 , H01L21/0217 , H01L21/02529 , H01L21/02532 , H01L21/02573 , H01L21/823418 , H01L21/823468 , H01L21/823481 , H01L21/845 , H01L29/0673 , H01L29/1083 , H01L29/165 , H01L29/66545 , H01L29/66795 , H01L29/7848 , H01L29/785
Abstract: Elongated fins of a first semiconductor material are insulated from and formed over an underlying substrate layer (of either SOI or bulk type). Elongated gates of a second semiconductor material are then formed to cross over the elongated fins at channel regions, and the gate side walls are covered by sidewall spacers. A protective material is provided to cover the underlying substrate layer and define sidewall spacers on side walls of the elongated fins between the elongated gates. The first semiconductor material and insulating material of the elongated fins located between the protective material sidewall spacers (but not under the elongated gates) is removed to form trenches aligned with the channel regions. Additional semiconductor material is then epitaxially grown inside each trench between the elongated gates to form source-drain regions adjacent the channel regions formed by the elongated fins of the first semiconductor material located under the elongated gates.
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公开(公告)号:US12293981B2
公开(公告)日:2025-05-06
申请号:US17733589
申请日:2022-04-29
Inventor: Stephane Monfray , Siddhartha Dhar , Alain Fleury
Abstract: The present disclosure relates to an electronic circuit comprising a semiconductor substrate, radiofrequency switches corresponding to MOS transistors comprising doped semiconductor regions in the substrate, at least two metallization levels covering the substrate, each metallization level comprising a stack of insulating layers, conductive pillars topped by metallic tracks, at least two connection elements each connecting one of the doped semiconductor regions and formed by conductive pillars and conductive tracks of each metallization level. The electronic circuit further comprises, between the two connection elements, a trench crossing completely the stack of insulating layers of one metallization level and further crossing partially the stack of insulating layers of the metallization level the closest to the substrate, and a heat dissipation device adapted for dissipating heat out of the trench.
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