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公开(公告)号：US20180323774A1
公开(公告)日：2018-11-08
申请号：US16031773
申请日：2018-07-10
Applicant: STMicroelectronics S.r.l.
Inventor： Marco Raimondi , Edoardo Botti
CPC classification number: H03K5/1252 , H03F1/26 , H03F1/32 , H03F3/217 , H03K4/08 , H03K5/01 , H03K7/08
Abstract: A method is for reducing pulse skipping from a characteristic affecting a modulating signal input to an integrator of a pulse width modulation (PWM) modulator, together with a square wave carrier signal for generating a triangular waveform of the PWM modulator. The method may include creating a broad synchronous peak at vertexes of the triangular waveform output by the integrator.
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公开(公告)号：US10104483B2
公开(公告)日：2018-10-16
申请号：US15216579
申请日：2016-07-21
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Marco Raimondi
IPC: H04R29/00
Abstract: A diagnostic circuit is used for detecting the load status of an audio amplifier. The audio amplifier includes two output terminals for connection to a speaker. The diagnostic circuit may include a first circuit, which configured to generate a first signal indicating whether a signal provided via the two output terminals comprises an audio signal. A second circuit can be configured to detect a first measurement signal being indicative for the output current provided via the two output terminals, and to compare the first measurement signal with at least one threshold in order to generate a second signal indicating whether the output current has a low current amplitude profile or a high current amplitude profile. A third circuit can be configured to generate a diagnostic signal as a function of the first and the second signal.
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公开(公告)号：US20170212546A1
公开(公告)日：2017-07-27
申请号：US15226568
申请日：2016-08-02
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Edoardo Botti
CPC classification number: G05F3/267 , H02M2001/0003 , H03D7/1491 , H03F1/3211 , H03F3/183 , H03F3/185 , H03F3/217 , H03F3/393 , H03F3/45183 , H03F3/45197 , H03F3/45775 , H03F2200/03 , H03F2200/351 , H03F2203/45356 , H03F2203/45392
Abstract: A voltage-current converter includes a first input stage and a second input stage with a first transistor and a second transistor driven by the first input stage and by the second input stage, respectively. First and second current generators are coupled to current lines of the first transistor and of the second transistor. At least one resistor couples the current lines of the first transistor and of the second transistor, where the ends of the aforesaid resistor are coupled to feedback terminals of the input stages so that an input voltage applied between voltage input terminals of the input stages is converted into a current on respective current output terminals of the converter. The converter includes switching circuits for coupling the first and second current generators alternately to the current line of the first transistor and to the current line of the second transistor.
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公开(公告)号：US20170150281A1
公开(公告)日：2017-05-25
申请号：US15216579
申请日：2016-07-21
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Marco Raimondi
IPC: H04R29/00
CPC classification number: H04R29/00 , G01R27/02 , H04R5/04 , H04R29/001 , H04R2420/05
Abstract: A diagnostic circuit is used for detecting the load status of an audio amplifier. The audio amplifier includes two output terminals for connection to a speaker. The diagnostic circuit may include a first circuit, which configured to generate a first signal indicating whether a signal provided via the two output terminals comprises an audio signal. A second circuit can be configured to detect a first measurement signal being indicative for the output current provided via the two output terminals, and to compare the first measurement signal with at least one threshold in order to generate a second signal indicating whether the output current has a low current amplitude profile or a high current amplitude profile. A third circuit can be configured to generate a diagnostic signal as a function of the first and the second signal.
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公开(公告)号：US11671009B2
公开(公告)日：2023-06-06
申请号：US17313505
申请日：2021-05-06
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti
CPC classification number: H02M3/155 , H03F3/217 , H04R3/04 , H03F2200/03
Abstract: An embodiment DC switching converter comprises first and second Zeta converters, each comprising an input stage, an output stage, a first switching stage, and a second switching stage. The input stage of each Zeta converter comprises a respective input inductor having a first terminal electrically coupled to the respective first switching stage. The input inductors of the input stages of the first and second Zeta converters are magnetically coupled in such a way that when current enters the terminal of the input inductor of the first Zeta converter that is coupled to the first switch stage of the first Zeta converter, a voltage induced by the coupled current is positive at the terminal of the input inductor of the second Zeta converter that is coupled to the first switching stage of the second Zeta converter.
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Patent Agency Ranking
公开(公告)号：US10763803B2
公开(公告)日：2020-09-01
申请号：US16269289
申请日：2019-02-06
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Tommaso Barbieri , Davide Luigi Brambilla , Cristiano Meroni
IPC: H03F3/217 , H03K17/687 , H03K3/017 , H04R3/00 , G05F1/575 , H03F1/02 , H02M3/158 , H02M3/00 , H03F3/187 , H02M1/00
Abstract: An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.
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27.发明申请公开(公告)号：US20190245435A1
公开(公告)日：2019-08-08
申请号：US16269195
申请日：2019-02-06
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Arunkumar Salimath , Edoardo Bonizzoni , Franco Maloberti , Paolo Cacciagrano , Davide Luigi Brambilla
IPC: H02M3/07 , H03F3/217 , H04R3/00 , B60R16/033
Abstract: A converter includes a first switch coupled between a first input terminal and a first terminal of an inductor, and a second switch coupled between a second terminal of the inductor and a second input terminal. A third switch is coupled between the second terminal of the inductor and a first output terminal, and a fourth switch is coupled between the first terminal of the inductor and a second output terminal. A capacitor is coupled between the first and second output terminals. A control circuit monitors a regulated voltage between the first and second output terminals. During a charge phase, the first and second switches are closed to charge the inductor. During a discharge phase, the third and fourth switches are closed to charge the capacitor and increase the regulated voltage.
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公开(公告)号：US20190049511A1
公开(公告)日：2019-02-14
申请号：US16057089
申请日：2018-08-07
Inventor： Edoardo Botti , Davide Luigi Brambilla , Hong Wu Lin
IPC: G01R31/26 , H03K17/687 , G01R19/00
Abstract: A circuit includes a field effect transistor having a gate driven via a drive signal. The field effect transistor has a drain-source voltage drop indicative of the intensity of a current flowing in the current path through the field effect transistor. The circuit also includes a pair of sensing transistors that include a first sensing field effect transistor arranged with its drain and gate coupled with the drain and the gate of the field effect transistor, respectively, and a second sensing field effect transistor having a gate configured for receiving a replica of the drive signal. The second sensing field effect transistor is arranged with its current path in series with the current path of the first sensing field effect transistor. A sensing signal at a sensing node is indicative of the current intensity flowing in the current path of the field effect transistor.
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公开(公告)号：US20190020960A1
公开(公告)日：2019-01-17
申请号：US16135624
申请日：2018-09-19
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Marco Raimondi
Abstract: A diagnostic circuit is used for detecting the load status of an audio amplifier. The audio amplifier includes two output terminals for connection to a speaker. The diagnostic circuit may include a first circuit, which configured to generate a first signal indicating whether a signal provided via the two output terminals comprises an audio signal. A second circuit can be configured to detect a first measurement signal being indicative for the output current provided via the two output terminals, and to compare the first measurement signal with at least one threshold in order to generate a second signal indicating whether the output current has a low current amplitude profile or a high current amplitude profile. A third circuit can be configured to generate a diagnostic signal as a function of the first and the second signal.
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公开(公告)号：US10018658B2
公开(公告)日：2018-07-10
申请号：US15212200
申请日：2016-07-16
Applicant: STMicroelectronics S.r.l.
Inventor： Edoardo Botti , Marco Raimondi
CPC classification number: G01R19/10 , G01R19/0092 , H03F1/3205 , H03F1/523 , H03F3/185 , H03F3/2173 , H03F2200/03 , H03F2200/171 , H03F2200/393 , H03F2200/444 , H03F2200/456 , H03F2200/462 , H03F2200/471 , H03F2200/481
Abstract: A circuit includes a final stage that includes an H-bridge comprising first and second half-bridges. A read circuit is configured to read a load current supplied by a class-D audio-amplifier to a load. The read circuit is configured for estimating the load current by reading a current at an output by the first or second half-bridge by measuring a drain-to-source voltage during an ON period of a power transistor of the H-bridge. A sensing circuit is configured to detect a first drain-to-source voltage from a transistor of the first half-bridge and a second drain-to-source voltage from a corresponding transistor of the second half-bridge. The sensing circuit is also configured to compute a difference between the first drain-to-source voltage and the second drain-to-source voltage and to perform an averaging operation on the difference to obtain a sense voltage value to be supplied to an analog-to-digital converter.
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