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公开(公告)号:US10096688B2
公开(公告)日:2018-10-09
申请号:US15206868
申请日:2016-07-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yong-suk Tak , Gi-gwan Park , Tae-jong Lee , Bon-young Koo , Ki-yeon Park , Sung-hyun Choi
IPC: H01L29/49 , H01L29/786 , H01L29/423 , H01L29/66 , H01L29/06
Abstract: An integrated circuit device includes a fin type active area protruding from a substrate and having an upper surface at a first level; a nanosheet extending in parallel to the upper surface of the fin type active area and comprising a channel area, the nanosheet being located at a second level spaced apart from the upper surface of the fin type active area; a gate disposed on the fin type active area and surrounding at least a part of the nanosheet, the gate extending in a direction crossing the fin type active area; a gate dielectric layer disposed between the nanosheet and the gate; a source and drain region formed on the fin type active area and connected to one end of the nanosheet; a first insulating spacer on the nanosheet, the first insulating spacer covering sidewalls of the gate; and a second insulating spacer disposed between the gate and the source and drain region in a space between the upper surface of the fin type active area and the nanosheet, the second insulating spacer having a multilayer structure.
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22.
公开(公告)号:US10038093B2
公开(公告)日:2018-07-31
申请号:US15223332
申请日:2016-07-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sug-Hyun Sung , Jung-gun You , Gi-gwan Park , Ki-il Kim
IPC: H01L29/78 , H01L21/8238 , H01L29/06 , H01L27/092 , H01L29/66 , H01L21/762
CPC classification number: H01L29/7843 , H01L21/76224 , H01L21/823821 , H01L21/823878 , H01L27/0924 , H01L29/0653 , H01L29/66795 , H01L29/66818 , H01L29/7851 , H01L29/7854
Abstract: An integrated circuit device includes a fin-type active area protruding from a substrate; a plurality of liners sequentially covering lower side walls of the fin-type active area; a device isolation layer covering the lower side walls of the fin-type active area with the plurality of liners between the device isolation layer and the fin-type active area; and a gate insulating layer extending to cover a channel region of the fin-type active area, the plurality of liners, and the device isolation layer, and including protrusions located on portions of the gate insulating layer which cover the plurality of liners.
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公开(公告)号:US09991264B1
公开(公告)日:2018-06-05
申请号:US15867329
申请日:2018-01-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ki-Il Kim , Jung-gun You , Gi-gwan Park
IPC: H01L21/8238 , H01L27/092 , H01L29/06
CPC classification number: H01L27/0924 , H01L21/823821 , H01L21/823878 , H01L29/0649 , H01L29/0657
Abstract: An integrated circuit device includes a double-humped protrusion protruding from a surface of an inter-device isolation region. To manufacture the integrated circuit device, a plurality of grooves are formed in the inter-device isolation region of a substrate, a recess is formed by partially removing a surface of the substrate between the plurality of grooves, at least one fin-type active area is formed in a device region by etching the substrate in the device region and the inter-device isolation region, and the double-humped protrusion is formed from the surface of the substrate in the inter-device isolation region.
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公开(公告)号:US09859392B2
公开(公告)日:2018-01-02
申请号:US15269001
申请日:2016-09-19
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ha-jin Lim , Gi-gwan Park , Weon-hong Kim
IPC: H01L29/49 , H01L29/51 , H01L27/088 , H01L29/423 , H01L27/092 , H01L29/78
CPC classification number: H01L29/4966 , H01L21/82345 , H01L21/823842 , H01L27/088 , H01L27/0886 , H01L27/092 , H01L29/42356 , H01L29/51 , H01L29/785
Abstract: An integrated circuit device includes a first gate stack formed on a first high dielectric layer and comprising a first work function adjustment metal containing structure and a second gate stack formed on a second high dielectric layer and comprising a second work function adjustment metal containing structure having an oxygen content that is greater than that of the first work function adjustment metal containing structure.
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公开(公告)号:US20170110554A1
公开(公告)日:2017-04-20
申请号:US15206868
申请日:2016-07-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yong-suk Tak , Gi-gwan Park , Tae-jong Lee , Bon-young Koo , Ki-yeon Park , Sung-hyun Choi
IPC: H01L29/49 , H01L29/66 , H01L29/423 , H01L29/786 , H01L29/06
CPC classification number: H01L29/4991 , H01L29/0673 , H01L29/42392 , H01L29/66439 , H01L29/66742 , H01L29/78696
Abstract: An integrated circuit device includes a fin type active area protruding from a substrate and having an upper surface at a first level; a nanosheet extending in parallel to the upper surface of the fin type active area and comprising a channel area, the nanosheet being located at a second level spaced apart from the upper surface of the fin type active area; a gate disposed on the fin type active area and surrounding at least a part of the nanosheet, the gate extending in a direction crossing the fin type active area; a gate dielectric layer disposed between the nanosheet and the gate; a source and drain region formed on the fin type active area and connected to one end of the nanosheet; a first insulating spacer on the nanosheet, the first insulating spacer covering sidewalls of the gate; and a second insulating spacer disposed between the gate and the source and drain region in a space between the upper surface of the fin type active area and the nanosheet, the second insulating spacer having a multilayer structure.
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