公开(公告)号：US11817170B2

公开(公告)日：2023-11-14

申请号：US17723959

申请日：2022-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woohyun Kang ,  Youngdeok Seo ,  Hyuna Kim ,  Hyunkyo Oh ,  Heewon Lee ,  Donghoo Lim

IPC: G11C29/00 ,  G11C29/50

CPC classification number: G11C29/50004 ,  G11C2029/5004

Abstract: Disclosed is a method of operating a storage controller which communicates with a non-volatile memory device. The method includes outputting a first command including a request for on-chip valley search (OVS) count data of a memory region of the non-volatile memory device to the non-volatile memory device, wherein the OVS count data include a first count value of a first read voltage and a second count value of a second read voltage, receiving the OVS count data from the non-volatile memory device, determining a first error count value for the first read voltage and a second error count value for the second read voltage, based on the OVS count data, and determining a subsequent operation, based on the first and second error count values.

公开(公告)号：US11715516B2

公开(公告)日：2023-08-01

申请号：US17391209

申请日：2021-08-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yunjung Lee ,  Chanha Kim ,  Kangho Roh ,  Heewon Lee

IPC: G11C7/00 ,  G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26

CPC classification number: G11C11/5671 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/26 ,  G11C2216/14

Abstract: A nonvolatile memory device including: a memory cell array, the memory cell array including a plurality of cell strings, at least one of the cell strings including a plurality of memory cells stacked in a direction perpendicular to a surface of a substrate, at least one of the memory cells is a multi-level cell storing at least three bits; and a control logic circuit configured to control a page buffer to read a fast read page of the memory cells with one read voltage and at least two normal read pages of the memory cells with the same number of read voltages.

公开(公告)号：US11081171B2

公开(公告)日：2021-08-03

申请号：US16838078

申请日：2020-04-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yunjung Lee ,  Chanha Kim ,  Kangho Roh ,  Heewon Lee

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26

Abstract: A nonvolatile memory device including: a memory cell array, the memory cell array including a plurality of cell strings, at least one of the cell strings including a plurality of memory cells stacked in a direction perpendicular to a surface of a substrate, at least one of the memory cells is a multi-level cell storing at least three bits; and a control logic circuit configured to control a page buffer to read a fast read page of the memory cells with one read voltage and at least two normal read pages of the memory cells with the same number of read voltages.

公开(公告)号：US10671524B2

公开(公告)日：2020-06-02

申请号：US16173390

申请日：2018-10-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangkwon Moon ,  Seung-Yeon Lee ,  Heewon Lee ,  In Hwan Doh ,  NamWook Kang

IPC: G06F12/02 ,  G06F3/06

Abstract: A method of operating a data storage device includes programming non-fully programmed memory blocks at a point in time when a reference time elapses from a point in time when each of the memory blocks is physically erased, acquiring a first interval and a second interval, calculating a disturb index based on the first interval and the second interval, selecting a victim block for garbage collection based on the disturb index, and copying valid page data of the victim block into a free block. The first interval is defined by a point in time when each of the memory blocks is physically erased and a point in time when each of the memory blocks is fully programmed. The second interval is an interval during which a fully programmed state is maintained after a point in time when each of the memory blocks is fully programmed.

公开(公告)号：US09837167B2

公开(公告)日：2017-12-05

申请号：US15227945

申请日：2016-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangkwon Moon ,  Sejeong Jang ,  Heewon Lee

IPC: G11C16/06 ,  G11C16/34 ,  G06F11/07 ,  G11C29/02 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/04 ,  G11C29/42 ,  G11C16/08 ,  G06F11/00 ,  G11C16/12

CPC classification number: G11C16/3495 ,  G06F11/008 ,  G06F11/073 ,  G06F11/0754 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/12 ,  G11C16/16 ,  G11C16/26 ,  G11C16/349 ,  G11C29/021 ,  G11C29/028 ,  G11C29/42

Abstract: A method for operating a storage device including a flash memory, comprising: determining a data reliability level of the flash memory; comparing the data reliability level with a threshold; and changing an operating condition of the flash memory to improve the data reliability level of the flash memory when the data reliability level of the flash memory is lower than the threshold.