公开(公告)号：US08040168B2

公开(公告)日：2011-10-18

申请号：US11188855

申请日：2005-07-26

申请人： Shiro Sakiyama ,  Yusuke Tokunaga ,  Shiro Dosho ,  Toru Iwata ,  Takashi Hirata

发明人： Shiro Sakiyama ,  Yusuke Tokunaga ,  Shiro Dosho ,  Toru Iwata ,  Takashi Hirata

IPC分类号： H03L7/06 ,  G05F3/02

CPC分类号： H02M3/07

摘要： The charge pump circuit includes: a first switch for controlling either one of push operation and pull operation based on a first control signal; a current mirror circuit composed of a transistor different in attribute from the first switch; and a second switch composed of a transistor same in characteristic as a transistor constituting the first switch, for controlling input of a current into the current mirror circuit based on a second control. The other operation, the push operation or the pull operation, is performed with a current output from the current mirror circuit.

摘要翻译： 电荷泵电路包括：第一开关，用于基于第一控制信号控制按压操作和拉动操作中的任一个; 由与第一开关属性不同的晶体管构成的电流镜电路; 以及由构成第一开关的晶体管的特性相同的晶体管构成的第二开关，用于基于第二控制来控制输入到电流镜像电路的电流。 另一个操作，推动操作或拉动操作由电流镜电路的电流输出执行。

公开(公告)号：US08013650B2

公开(公告)日：2011-09-06

申请号：US11514151

申请日：2006-09-01

申请人： Shiro Dosho ,  Shiro Sakiyama ,  Yusuke Tokunaga ,  Seiji Watanabe ,  Hiroshi Koshida

发明人： Shiro Dosho ,  Shiro Sakiyama ,  Yusuke Tokunaga ,  Seiji Watanabe ,  Hiroshi Koshida

IPC分类号： H03H11/16

CPC分类号： H03K5/13 ,  H03K5/15013 ,  H03K2005/00052 ,  H03K2005/00273

摘要： A phase adjustment circuit includes first to nth two-phase adjustment circuits. Each two-phase adjustment circuit includes a first logic circuit for performing logical sum of two input signals, a second logic circuit for performing logical product of the two input signals, a first delay circuit having a signal delay equal to that of the second logic circuit and configured to delay a signal output from the first logic circuit, and a second delay circuit having a signal delay equal to that of the first logic circuit and configured to delay a signal output from the second logic circuit. Two signals output from two of the two-phase adjustment circuits in a certain stage are input into one of the two-phase adjustment circuits in the next stage.

摘要翻译： 相位调整电路包括第一至第二相位调整电路。 每个两相调节电路包括用于执行两个输入信号的逻辑和的第一逻辑电路，用于执行两个输入信号的逻辑积的第二逻辑电路，具有等于第二逻辑电路的信号延迟的信号延迟的第一延迟电路 并且被配置为延迟从第一逻辑电路输出的信号;以及第二延迟电路，其具有等于第一逻辑电路的信号延迟的信号延迟，并且被配置为延迟从第二逻辑电路输出的信号。 在一定阶段从两相调节电路中输出的两个信号在下一级输入到两相调节电路之一。

公开(公告)号：US20080303567A1

公开(公告)日：2008-12-11

申请号：US12033707

申请日：2008-02-19

申请人： Shiro SAKIYAMA ,  Yusuke Tokunaga ,  Shiro Dosho ,  Toru Iwata ,  Takashi Hirata ,  Hideki Yoshii ,  Yasuyuki Doi ,  Makoto Hattori

发明人： Shiro SAKIYAMA ,  Yusuke Tokunaga ,  Shiro Dosho ,  Toru Iwata ,  Takashi Hirata ,  Hideki Yoshii ,  Yasuyuki Doi ,  Makoto Hattori

IPC分类号： H03L7/06

CPC分类号： H03L7/0812 ,  H03L7/07 ,  H03L7/0891 ,  H03L7/0895

摘要： A delay element generates a delayed clock signal which transitions with a delay from a rising (or falling) of a reference clock signal by a delay amount determined based on an output of a loop filter. A signal generation circuit generates two signals which complementarily change according to rising and falling of the reference clock signal and a transition of the delayed clock signal. A charge pump circuit performs on the loop filter, according to these two signals, a push (or pull) operation during an interval extending from a rising (or falling) of the reference clock signal to the transition of the delayed clock signal and a pull (or push) operation during an interval extending from the transition of the delayed clock signal to a falling (or rising) of the reference clock signal.

摘要翻译： 延迟元件产生延迟的时钟信号，该时钟信号以基于参考时钟信号的上升（或下降）的延迟从基于环路滤波器的输出确定的延迟量转变。 信号产生电路产生根据参考时钟信号的上升和下降以及延迟的时钟信号的转变而互补地变化的两个信号。 电荷泵电路根据这两个信号执行环路滤波器，在从参考时钟信号的上升（或下降）延迟到延迟的时钟信号的转换的延迟期间进行推（或拉） （或推动）操作在从延迟的时钟信号的转变延伸到参考时钟信号的下降（或上升）的间隔期间。

公开(公告)号：US20070090859A1

公开(公告)日：2007-04-26

申请号：US11513239

申请日：2006-08-31

申请人： Yusuke Tokunaga ,  Shiro Sakiyama ,  Shiro Dosho ,  Yasuyuki Doi ,  Makoto Hattori

发明人： Yusuke Tokunaga ,  Shiro Sakiyama ,  Shiro Dosho ,  Yasuyuki Doi ,  Makoto Hattori

IPC分类号： H03K19/094

CPC分类号： H03K19/018571 ,  H03F1/0261 ,  H03F3/505 ,  H03F2200/18 ,  H04L25/028

摘要： A time required for an output voltage of a source follower to rise from Low to a predetermined voltage depends on a bias voltage. Therefore, by setting a converged voltage of an output voltage to be high by increasing the bias voltage, the time required to rise up to the predetermined voltage can be reduced. Therefore, a first source follower which is biased so that the converged value of the output voltage becomes a predetermined Hi voltage when an input data signal goes from Low to Hi, and a second source follower which is biased so as to become the Hi voltage after a period of one clock when an input data signal goes from Low to Hi, are used. The two source followers are operated with appropriate timing.

摘要翻译： 源极跟随器的输出电压从低电平上升到预定电压所需的时间取决于偏置电压。 因此，通过增加偏置电压来设定输出电压的收敛电压为高，可以降低上升到预定电压所需的时间。 因此，当输入数据信号从低电平变为高电平时，被偏压使得输出电压的会聚值变为预定的Hi电压的第一源极跟随器，以及被偏置以便成为Hi电压之后的第二源极跟随器 使用输入数据信号从低电平变为高电平时的一个时钟周期。 两个来源追随者在适当的时机运行。

公开(公告)号：US20060097772A1

公开(公告)日：2006-05-11

申请号：US11188855

申请日：2005-07-26

申请人： Shiro Sakiyama ,  Yusuke Tokunaga ,  Shiro Dosho ,  Toru Iwata ,  Takashi Hirata

发明人： Shiro Sakiyama ,  Yusuke Tokunaga ,  Shiro Dosho ,  Toru Iwata ,  Takashi Hirata

IPC分类号： G05F1/10

CPC分类号： H02M3/07

摘要： The charge pump circuit includes: a first switch for controlling either one of push operation and pull operation based on a first control signal; a current mirror circuit composed of a transistor different in attribute from the first switch; and a second switch composed of a transistor same in characteristic as a transistor constituting the first switch, for controlling input of a current into the current mirror circuit based on a second control. The other operation, the push operation or the pull operation, is performed with a current output from the current mirror circuit.

摘要翻译： 电荷泵电路包括：第一开关，用于基于第一控制信号控制按压操作和拉动操作中的任一个; 由与第一开关属性不同的晶体管构成的电流镜电路; 以及由构成第一开关的晶体管的特性相同的晶体管构成的第二开关，用于基于第二控制来控制输入到电流镜像电路的电流。 另一个操作，推动操作或拉动操作由电流镜电路的电流输出执行。

公开(公告)号：US07327182B2

公开(公告)日：2008-02-05

申请号：US11396464

申请日：2006-04-04

申请人： Shiro Dosho ,  Yusuke Tokunaga ,  Takashi Morie

发明人： Shiro Dosho ,  Yusuke Tokunaga ,  Takashi Morie

IPC分类号： G06F7/64

CPC分类号： H03H19/004 ,  H03D13/004 ,  H03L7/0891 ,  H03L7/093 ,  H03L7/18

摘要： A switched capacitor filter comprises three switched capacitor circuits. Each switched capacitor circuit has a capacitance. A first state that the capacitance is connected to an input end of a current signal, a second state that the capacitance is connected to an output end of a voltage signal, and a third state that the capacitance is connected to a side of a filter capacitance, are cycled. These three switched capacitor circuits are operated under an interleave control so that the first to third states do not each overlap between the three switched capacitor circuits.

摘要翻译： 开关电容滤波器包括三个开关电容器电路。 每个开关电容电路具有电容。 电容连接到电流信号的输入端的第一状态，电容连接到电压信号的输出端的第二状态，以及电容连接到滤波电容的一侧的第三状态 ，循环。 这三个开关电容器电路在交错控制下操作，使得第一至第三状态在三个开关电容器电路之间不重叠。

公开(公告)号：US20060226896A1

公开(公告)日：2006-10-12

申请号：US11396464

申请日：2006-04-04

申请人： Shiro Dosho ,  Yusuke Tokunaga ,  Takashi Morie

发明人： Shiro Dosho ,  Yusuke Tokunaga ,  Takashi Morie

IPC分类号： H03K5/00

CPC分类号： H03H19/004 ,  H03D13/004 ,  H03L7/0891 ,  H03L7/093 ,  H03L7/18

摘要： A switched capacitor filter comprises three switched capacitor circuits. Each switched capacitor circuit has a capacitance. A first state that the capacitance is connected to an input end of a current signal, a second state that the capacitance is connected to an output end of a voltage signal, and a third state that the capacitance is connected to a side of a filter capacitance, are cycled. These three switched capacitor circuits are operated under an interleave control so that the first to third states do not each overlap between the three switched capacitor circuits.

摘要翻译： 开关电容滤波器包括三个开关电容器电路。 每个开关电容电路具有电容。 电容连接到电流信号的输入端的第一状态，电容连接到电压信号的输出端的第二状态，以及电容连接到滤波电容的一侧的第三状态 ，循环。 这三个开关电容器电路在交错控制下操作，使得第一至第三状态在三个开关电容器电路之间不重叠。

公开(公告)号：US07605645B2

公开(公告)日：2009-10-20

申请号：US11643704

申请日：2006-12-22

申请人： Takashi Morie ,  Akinori Matsumoto ,  Shiro Dosho

发明人： Takashi Morie ,  Akinori Matsumoto ,  Shiro Dosho

IPC分类号： G06G7/12

CPC分类号： H03H11/0433 ,  H03F3/45475 ,  H03H2011/0494

摘要： A transconductor for receiving a differential voltage signal and outputting a differential current signal, includes two transconductors for receiving the differential voltage signal and outputting a single-end current signal. An inversion input terminal of one of the two transconductors is connected with a non-inversion input terminal of the other. The transconductor outputs a current signal output from each of the two transconductors as the differential current signal.

摘要翻译： 用于接收差分电压信号并输出​​差分电流信号的跨导体包括用于接收差分电压信号并输出​​单端电流信号的两个跨导体。 两个跨导体之一的反相输入端子与另一个的非反相输入端子连接。 跨导体输出从两个跨导体中的每一个输出的电流信号作为差分电流信号。

公开(公告)号：US20070146064A1

公开(公告)日：2007-06-28

申请号：US11643704

申请日：2006-12-22

申请人： Takashi Morie ,  Akinori Matsumoto ,  Shiro Dosho

发明人： Takashi Morie ,  Akinori Matsumoto ,  Shiro Dosho

IPC分类号： G06G7/12

CPC分类号： H03H11/0433 ,  H03F3/45475 ,  H03H2011/0494

摘要： A transconductor for receiving a differential voltage signal and outputting a differential current signal, includes two transconductors for receiving the differential voltage signal and outputting a single-end current signal. An inversion input terminal of one of the two transconductors is connected with a non-inversion input terminal of the other. The transconductor outputs a current signal output from each of the two transconductors as the differential current signal.

摘要翻译： 用于接收差分电压信号并输出​​差分电流信号的跨导体包括用于接收差分电压信号并输出​​单端电流信号的两个跨导体。 两个跨导体之一的反相输入端子与另一个的非反相输入端子连接。 跨导体输出从两个跨导体中的每一个输出的电流信号作为差分电流信号。

公开(公告)号：US07876166B2

公开(公告)日：2011-01-25

申请号：US12831715

申请日：2010-07-07

申请人： Shiro Dosho ,  Shiro Sakiyama ,  Noriaki Takeda

发明人： Shiro Dosho ,  Shiro Sakiyama ,  Noriaki Takeda

IPC分类号： H03K3/03

CPC分类号： H03K3/0315

摘要： A coupled ring oscillator includes n ring oscillators (20) each including m inverter circuits (10), and a phase-coupling loop (40) in which m×n phase-coupling circuits (30), each of which couples signal phases at two points in a certain phase mode, are connected with each other to form a loop. Connection points at which the inverter circuits (10) are connected with each other and the connection points at which the phase-coupling circuits (30) are connected with each other are connected bijectively; and each of the inverter circuits (10) is connected between two points that divide the phase-coupling circuits (30) into two parts at a certain ratio.

摘要翻译： 耦合环形振荡器包括n个环形振荡器（20），每个环形振荡器（20）包括m个逆变器电路（10）和相位耦合回路（40），其中m×n个相位耦合电路（30） 点在某一相位模式下，相互连接形成一个回路。 逆变器电路（10）彼此连接的连接点和相位耦合电路（30）彼此连接的连接点彼此连接; 并且每个逆变器电路（10）连接在将相耦合电路（30）以一定比例分成两部分的两个点之间。