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21.
公开(公告)号:US11409650B2
公开(公告)日:2022-08-09
申请号:US16683211
申请日:2019-11-13
Applicant: Silicon Motion, Inc.
Inventor: Jian-Dong Du , Chia-Jung Hsiao , Pi-Ju Tsai
IPC: G06F12/00 , G06F12/02 , G06F12/0882 , G06F13/16 , G11C7/22 , G11C11/4074 , G06F11/07
Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a time-management circuit. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the time-management circuit is configured to generate current time information. In the operations of the flash memory controller, when the microprocessor writes data into last pages of a specific block of the flash memory module, the microprocessor writes the time information generated by the time-management circuit into one of the last pages of the specific block.
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22.
公开(公告)号:US20210334039A1
公开(公告)日:2021-10-28
申请号:US16856008
申请日:2020-04-22
Applicant: Silicon Motion, Inc.
Inventor: Jian-Dong Du , Pi-Ju Tsai
Abstract: The present invention discloses a method for accessing a flash memory module, wherein the flash memory module comprises a plurality of block, each block is implemented by a plurality of word lines, and each word line comprises a plurality of memory cells supporting a plurality of states. The method comprises the steps of: reading the memory cells of at least a first word line of a specific block of the plurality of blocks to obtain a cumulative distribution information of the states of the memory cells; determining a target decoding flow selected from at least a first decoding flow and a second decoding flow according to the cumulative distribution information; reading the memory cells of a second word line to obtain readout information of the second word line; and using the target decoding flow to decode the readout information of the second word line.
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公开(公告)号:US20210248036A1
公开(公告)日:2021-08-12
申请号:US17242326
申请日:2021-04-28
Applicant: Silicon Motion, Inc.
Inventor: Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
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公开(公告)号:US20200233745A1
公开(公告)日:2020-07-23
申请号:US16841688
申请日:2020-04-07
Applicant: Silicon Motion, Inc.
Inventor: Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
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公开(公告)号:US20190073263A1
公开(公告)日:2019-03-07
申请号:US16184925
申请日:2018-11-08
Applicant: Silicon Motion Inc.
Inventor: Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
CPC classification number: G06F11/1068 , G06F11/1072 , G06F11/1076 , G11C11/5621 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/10 , G11C16/26 , G11C29/52 , G11C2211/5641
Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
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公开(公告)号:US10157098B2
公开(公告)日:2018-12-18
申请号:US15997674
申请日:2018-06-04
Applicant: Silicon Motion Inc.
Inventor: Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
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公开(公告)号:US20170288698A1
公开(公告)日:2017-10-05
申请号:US15083310
申请日:2016-03-29
Applicant: Silicon Motion Inc.
Inventor: Jian-Dong Du
IPC: H03M13/11
CPC classification number: H03M13/1108 , H03M13/1111 , H03M13/1128 , H03M13/3715
Abstract: A method for determining when to end a bit flipping algorithm during hard decision soft decoding in a low density parity check (LDPC) decoder includes: selecting a certain number of iterations as a first threshold; when the first threshold is reached, determining a highest variable node codeword for each iteration performed so far; comparing the highest variable node codewords with a second threshold; and when the value of the highest variable node codewords is less than or equal to the second threshold, ending the bit flipping algorithm.
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公开(公告)号:US12197285B2
公开(公告)日:2025-01-14
申请号:US18498069
申请日:2023-10-31
Applicant: Silicon Motion, Inc.
Inventor: Tsung-Chieh Yang , Hong-Jung Hsu , Jian-Dong Du
Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.
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29.
公开(公告)号:US11630768B2
公开(公告)日:2023-04-18
申请号:US17853888
申请日:2022-06-29
Applicant: Silicon Motion, Inc.
Inventor: Jian-Dong Du , Chia-Jung Hsiao , Pi-Ju Tsai
IPC: G06F12/00 , G06F12/02 , G06F12/0882 , G06F13/16 , G11C7/22 , G11C11/4074 , G06F11/07
Abstract: A flash memory controller includes a read only memory (ROM) and a microprocessor. The ROM is arranged to store a program code. The microprocessor is arranged to execute the program code to control access of a flash memory module. When executing the program code, the microprocessor is arranged to perform operations of: monitoring data retention state of one or more blocks in the flash memory module by reading a last page of the one or more blocks to obtain time information regarding the one or more blocks, which is generated by the flash memory controller; and arranging a specific block to a garbage collection process if time information obtained from the last page of the specific block exceeds a threshold.
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30.
公开(公告)号:US11573734B2
公开(公告)日:2023-02-07
申请号:US16732333
申请日:2020-01-01
Applicant: Silicon Motion, Inc.
Inventor: Jian-Dong Du , Pi-Ju Tsai , Tsung-Chieh Yang
Abstract: The present invention proposes a method for managing a plurality of memory units in a flash memory module. The method includes: creating a programed timestamp corresponding to each first memory unit according to a data-written time of said each first memory unit; selecting a corresponding read-retry table for performing a read operation upon said each first memory unit according to the programed timestamp of said each first memory unit; and performing a first refresh operation according to program timestamps of first memory units that have been written with data.
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