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    Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layer
    21.
    发明授权
    Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layer 有权
    形成电子器件的工艺包括与半导体层内的开口相邻的致密的氮化物层

    公开(公告)号：US07528078B2

    公开(公告)日：2009-05-05

    申请号：US11433298

    申请日：2006-05-12

    申请人： Toni D. Van Gompel ,  Kuang-Hsin Chen ,  Laegu Kang ,  Rode R. Mora ,  Michael D. Turner

    发明人： Toni D. Van Gompel ,  Kuang-Hsin Chen ,  Laegu Kang ,  Rode R. Mora ,  Michael D. Turner

    IPC分类号： H01L21/31 ,  H01L21/469

    CPC分类号： H01L21/31111 ,  H01L21/3105 ,  H01L21/31116 ,  H01L21/76205

    摘要： A process of forming an electronic device can include patterning a semiconductor layer to define an opening extending to an insulating layer, wherein the insulating layer lies between a substrate and the semiconductor layer. After patterning the semiconductor layer, the opening can have a bottom, and the semiconductor layer can have a sidewall and a surface. The surface can be spaced apart from the insulating layer, and the sidewall can extend from the surface towards the insulating layer. The process can also include depositing a nitride layer within the opening, wherein depositing is performed using a PECVD technique. The process can further include densifying the nitride layer. The process can still further include removing a part of the nitride layer, wherein a remaining portion of the nitride layer can lie within the opening and be spaced apart from the surface.

    摘要翻译： 形成电子器件的过程可以包括图案化半导体层以限定延伸到绝缘层的开口，其中绝缘层位于衬底和半导体层之间。 在图案化半导体层之后，开口可以具有底部，并且半导体层可以具有侧壁和表面。 表面可以与绝缘层间隔开，并且侧壁可以从表面延伸到绝缘层。 该方法还可以包括在开口内沉积氮化物层，其中使用PECVD技术进行沉积。 该方法还可以包括使氮化物层致密化。 该方法还可以进一步包括去除氮化物层的一部分，其中氮化物层的剩余部分可以位于开口内并且与表面间隔开。

    Method and apparatus for reducing waiting time jitter in pulse stuffing synchronized digital communications
    27.
    发明授权
    Method and apparatus for reducing waiting time jitter in pulse stuffing synchronized digital communications 失效
    减少脉冲填充同步数字通信中等待时间抖动的方法和装置

    公开(公告)号：US5680422A

    公开(公告)日：1997-10-21

    申请号：US429951

    申请日：1995-04-27

    申请人： Richard A. Burch ,  Kevin W. Schneider ,  Michael D. Turner ,  Timothy D. Rochell

    发明人： Richard A. Burch ,  Kevin W. Schneider ,  Michael D. Turner ,  Timothy D. Rochell

    IPC分类号： H04J3/07 ,  H04L7/00

    CPC分类号： H04J3/073

    摘要： A wander reduction mechanism in an HDSL pulse-stuffing synchronization system provides a more precise measure of the phase of the incoming asynchronous signal than is obtained in conventional schemes, in which the only information available is the presence or absence of stuffing pulses. An auxiliary phase comparator and phase adjuster are incorporated into the synchronizer-multiplexer to generate a reference data clock (derived from the synchronized data clock), so that the incoming unsynchronized data clock can be tracked. As the clock is iteratively phase-adjusted, the respective changes are accumulated. At the end of a prescribed measurement interval, the net contents of the accumulator are encoded and transported over the synchronous digital data communication channel to the receiver. By decoding this sequence information, the desynchronizer is able to generate a desynchronized data clock having the same number of net phase adjustments during a measurement period as the reference clock at the synchronizer.

    摘要翻译： 在HDSL脉冲填充同步系统中的漫游减少机制提供了比传统方案中获得的输入异步信号的相位更精确的测量，其中唯一可用的信息是填充脉冲的存在或不存在。 辅助相位比较器和相位调节器被并入到同步器多路复用器中以产生参考数据时钟（从同步数据时钟导出），使得可以跟踪输入的不同步的数据时钟。 随着时钟被迭代地相位调整，各个变化被累积。 在规定的测量间隔结束时，累加器的净内容被编码并通过同步数字数据通信信道传送到接收机。 通过对该序列信息进行解码，去同步器能够在测量周期期间产生具有相同数量的净相位调整的去同步数据时钟作为同步器处的参考时钟。

    Anesthetic pharmaceutical combination
    29.
    发明授权
    Anesthetic pharmaceutical combination 失效
    麻醉药物组合

    公开(公告)号：US5505922A

    公开(公告)日：1996-04-09

    申请号：US394049

    申请日：1995-02-24

    申请人： Paul D. Thut ,  Michael D. Turner

    发明人： Paul D. Thut ,  Michael D. Turner

    IPC分类号： A61K33/14 ,  A61K33/00

    CPC分类号： A61K33/14 ,  Y10S514/818

    摘要： An anesthetic pharmaceutical combination comprising the combination of a local anesthetic and lithium ions present in an amount effective to lower the amount of the local anesthetic necessary to achieve equivalent anesthetic effect in a patient and a method of use of the anesthetic pharmaceutical combination.

    摘要翻译： 一种麻醉药物组合，其包含局部麻醉剂和锂离子的组合，所述组合以有效降低实现患者的等效麻醉效果所需的局部麻醉剂的量的量和使用麻醉药物组合的方法。

    Reducing microelectromechanical systems stiction by formation of a silicon carbide layer
    30.
    发明授权
    Reducing microelectromechanical systems stiction by formation of a silicon carbide layer 有权
    通过形成碳化硅层来减少微机电系统的粘滞

    公开(公告)号：US09108842B2

    公开(公告)日：2015-08-18

    申请号：US13946729

    申请日：2013-07-19

    申请人： Michael D. Turner ,  Ruben B. Montez

    发明人： Michael D. Turner ,  Ruben B. Montez

    IPC分类号： B81C1/00 ,  B81B3/00

    CPC分类号： B81C1/0038 ,  B81B3/0005 ,  B81C2201/112

    摘要： A mechanism is provided for reducing stiction in a MEMS device by forming a near-uniform silicon carbide layer on silicon surfaces using carbon from TEOS-based silicon oxide sacrificial films used during fabrication. By using the TEOS as a source of carbon to form an antistiction coating, all silicon surfaces can be coated, including those that are difficult to coat using standard self-assembled monolayer (SAM) processes (e.g., locations beneath the proof mass). Controlled processing parameters, such as temperature, length of time for annealing, and the like, provide for a near-uniform silicon carbide coating not provided by previous processes.

    摘要翻译： 提供了一种用于通过在制造期间使用的基于TEOS的氧化硅牺牲膜的碳在硅表面上形成近均匀的碳化硅层来减少MEMS器件中的静摩擦的机构。 通过使用TEOS作为碳源来形成抗静电涂层，可以涂覆所有的硅表面，包括使用标准自组装单层（SAM）工艺（例如，证明质量下方的位置）难以涂覆的硅表面。 诸如温度，退火时间长度等受控加工参数提供了以前的方法未提供的近均匀的碳化硅涂层。