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公开(公告)号：US10330767B2
公开(公告)日：2019-06-25
申请号：US14951902
申请日：2015-11-25
Applicant: Texas Instruments Incorporated
Inventor： Abhijit Kumar Das , Christy Lee She
Abstract: A calibrated measurement circuit, with a first node, a second node, a circuit element coupled between the first node and the second node, and a reference circuit element. The calibrated measurement circuit also comprises circuitry for directing a first current and a second current between the first node and the second node and to the reference circuit element. The calibrated measurement circuit also comprises circuitry for measuring voltage across the circuit element in response to the first and second currents, and circuitry for measuring voltage across the reference circuit element in response to the first and second currents. A calibration factor is also determined for calibrating measured voltages across the circuit element, in response to a relationship between the first voltage, the second voltage, and the reference circuit element.
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公开(公告)号：US20180335459A1
公开(公告)日：2018-11-22
申请号：US16048559
申请日：2018-07-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Krishnasawamy Nagaraj , Paul Kimelman , Abhijit Kumar Das
IPC: G01R27/26
CPC classification number: G01R27/2605
Abstract: A capacitive sensing system includes a controller, a node connected to one side of a capacitance, the controller configured to measure the capacitance by measuring a time for a voltage across the capacitance to reach a predetermined reference voltage, a noise measurement circuit configured to measure electrical noise on the node, and the controller receiving the measurement of noise from the noise measurement circuit.
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公开(公告)号：US20170126235A1
公开(公告)日：2017-05-04
申请号：US15296082
申请日：2016-10-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Abhijit Kumar Das
Abstract: A system, method and apparatus for tuning an internal oscillator to a desired frequency F1 is shown and uses an RC delay element that comprises a resistor, a capacitor and a comparator. The method includes receiving a clock signal from an oscillator to be tuned, triggering charging of the RC delay element, and N clock cycles after triggering the charging, the method determines whether the charge on the precision RC delay element is higher than or lower than a reference voltage. Correction to the clock frequency is based on the results.
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公开(公告)号：US09503100B1
公开(公告)日：2016-11-22
申请号：US14927649
申请日：2015-10-30
Applicant: Texas Instruments Incorporated
Inventor： Abhijit Kumar Das
Abstract: A system, method and apparatus for tuning an internal oscillator to a desired frequency F1 is shown and uses an RC delay element that comprises a resistor, a capacitor and a comparator. The method includes receiving a clock signal from an oscillator to be tuned, triggering charging of the RC delay element, and N clock cycles after triggering the charging, the method determines whether the charge on the precision RC delay element is higher than or lower than a reference voltage. Correction to the clock frequency is based on the results.
Abstract translation: 示出了用于将内部振荡器调谐到期望频率F1的系统，方法和装置，并且使用包括电阻器，电容器和比较器的RC延迟元件。 该方法包括：接收来自待调谐的振荡器的时钟信号，触发RC延迟元件的充电，触发充电后的N个时钟周期，该方法确定精密RC延迟元件上的电荷是否高于或低于 参考电压。 校正到时钟频率是基于结果。
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公开(公告)号：US20230378961A1
公开(公告)日：2023-11-23
申请号：US18115682
申请日：2023-02-28
Applicant: Texas Instruments Incorporated
Inventor： Bhavesh G. Bhakta , Venkateswara Reddy Pothireddy , Abhijit Kumar Das
CPC classification number: H03L7/0818 , H03L7/0816 , H03L7/0814 , H03L7/085
Abstract: An example apparatus includes: digitally locked loop (DLL) circuitry coupled to a clock terminal and configured to generate a plurality of delayed clocks at a plurality of delayed clock terminals based on a reference clock of the clock terminal; first retimer circuitry coupled to the plurality of delayed clock terminals, a first data terminal, and a second data terminal, the first retimer circuitry configured to delay and serialize data of the first data terminal and the second data terminal using at least one of the delayed clocks of the plurality of delayed clock terminals; and second retimer circuitry coupled to the plurality of delayed clock terminals, a third data terminal, and a fourth data terminal, the second retimer circuitry configured to delay and serialize data of the third data terminal and the fourth data terminal.
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Patent Agency Ranking
公开(公告)号：US10862467B2
公开(公告)日：2020-12-08
申请号：US16733015
申请日：2020-01-02
Applicant: Texas Instruments Incorporated
Inventor： Abhijit Kumar Das
Abstract: A system includes an oscillator comprising a first switch, a current source, a capacitor, and a comparator, the capacitor and the comparator coupled at a node. The system includes one or more delay buffers coupled to the comparator. The system includes a first inverter coupled to the one or more delay buffers. The system includes a first buffer coupled to the one or more delay buffers. The system includes a first coupling capacitor coupled to the first inverter and the first buffer via second and third switches, respectively. The system includes a second inverter coupled to the one or more delay buffers. The system includes a second buffer coupled to the one or more delay buffers. The system includes a second coupling capacitor coupled to the second inverter and the second buffer via fourth and fifth switches, respectively. The first and second coupling capacitors are coupled to the oscillator.
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公开(公告)号：US20200287526A1
公开(公告)日：2020-09-10
申请号：US16733015
申请日：2020-01-02
Applicant: Texas Instruments Incorporated
Inventor： Abhijit Kumar Das
Abstract: A system includes an oscillator comprising a first switch, a current source, a capacitor, and a comparator, the capacitor and the comparator coupled at a node. The system includes one or more delay buffers coupled to the comparator. The system includes a first inverter coupled to the one or more delay buffers. The system includes a first buffer coupled to the one or more delay buffers. The system includes a first coupling capacitor coupled to the first inverter and the first buffer via second and third switches, respectively. The system includes a second inverter coupled to the one or more delay buffers. The system includes a second buffer coupled to the one or more delay buffers. The system includes a second coupling capacitor coupled to the second inverter and the second buffer via fourth and fifth switches, respectively. The first and second coupling capacitors are coupled to the oscillator.
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公开(公告)号：US20200177189A1
公开(公告)日：2020-06-04
申请号：US16781418
申请日：2020-02-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Abhijit Kumar Das
Abstract: A system, method and apparatus for tuning an internal oscillator to a desired frequency F1 is shown and uses an RC delay element that comprises a resistor, a capacitor and a comparator. The method includes receiving a clock signal from an oscillator to be tuned, triggering charging of the RC delay element, and N clock cycles after triggering the charging, the method determines whether the charge on the precision RC delay element is higher than or lower than a reference voltage. Correction to the clock frequency is based on the results.
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公开(公告)号：US10466286B2
公开(公告)日：2019-11-05
申请号：US15845898
申请日：2017-12-18
Applicant: Texas Instruments Incorporated
Inventor： Krishnasawamy Nagaraj , Paul Kimelman , Abhijit Kumar Das
IPC: G01R27/26
Abstract: A system includes a controller, a node connected to one side of a capacitance, the controller configured to measure the capacitance by measuring a time for a voltage across the capacitance to reach a predetermined reference voltage, and the controller causing the time period for capacitance measurements to vary even when the capacitance is constant.
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公开(公告)号：US10422822B2
公开(公告)日：2019-09-24
申请号：US16048559
申请日：2018-07-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Krishnasawamy Nagaraj , Paul Kimelman , Abhijit Kumar Das
IPC: G01R27/26
Abstract: A capacitive sensing system includes a controller, a node connected to one side of a capacitance, the controller configured to measure the capacitance by measuring a time for a voltage across the capacitance to reach a predetermined reference voltage, a noise measurement circuit configured to measure electrical noise on the node, and the controller receiving the measurement of noise from the noise measurement circuit.
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