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公开(公告)号:US11067440B2
公开(公告)日:2021-07-20
申请号:US16437108
申请日:2019-06-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rakul Viswanath , Nagesh Surendranath , Sandeep Kesrimal Oswal , Ratna Kumar Venkata Parupudi
Abstract: A dark current compensation circuit comprises a first comparator having inputs for a detection signal and a first voltage, and a second comparator having inputs for the detection signal and a second voltage. The dark current compensation circuit also comprises a controller coupled to the first and second comparators, which has an input for an event signal. An adjustable current source is coupled to the controller and configured to generate a compensation current. The controller adjusts a value of the compensation current based on the first and second comparator outputs and maintains a constant value in response to the event signal indicating photons incident on a photon detector. In some implementations, the dark current compensation circuit further comprises an analog sub-circuit coupled to the adjustable current source and configured to receive the detection signal. The analog sub-circuit generates an analog compensation current in response to the detection signal.
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公开(公告)号:US10890674B2
公开(公告)日:2021-01-12
申请号:US16247639
申请日:2019-01-15
Applicant: Texas Instruments Incorporated
Inventor: Rakul Viswanath , Nagesh Surendranath , Sandeep Kesrimal Oswal , Ratna Kumar Venkata Parupudi
Abstract: In described examples, a charge sensitive amplifier (CSA) generates an integrated signal in response to a current signal. A high pass filter is coupled to the CSA and receives the integrated signal and an inverse of an event signal, the high pass filter generates a coarse signal. An active comparator is coupled to the high pass filter and receives the coarse signal and a primary reference voltage signal, the active comparator generates the event signal.
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公开(公告)号:US10098595B2
公开(公告)日:2018-10-16
申请号:US14871245
申请日:2015-09-30
Applicant: Texas Instruments Incorporated
Inventor: Nagesh Surendranath , Rakul Viswanath , Sandeep Kesrimal Oswal
Abstract: The disclosure provides a circuit that includes a charge sensitive amplifier (CSA) that generates an integrated signal in response to a current signal. An active comparator is coupled to the CSA. The active comparator receives the integrated signal and a primary reference voltage signal, and generates an event detect signal. A first delay element is coupled to the active comparator and provides a fixed delay to the event detect signal to generate a convert signal. A discriminator system is coupled to the CSA. The discriminator system samples the integrated signal when activated by the convert signal.
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公开(公告)号:US10060864B2
公开(公告)日:2018-08-28
申请号:US15900621
申请日:2018-02-20
Applicant: Texas Instruments Incorporated
Inventor: Goli Sravana Kumar , Nagesh Surendranath
CPC classification number: G01N23/04 , A61B6/42 , H04N5/32 , H04N5/3575 , H04N5/378
Abstract: The disclosure provides a receiver with reduced noise. The receiver includes a photodiode that generates an input signal in response to received light pulses. A pixel switch is coupled to the photodiode. An operational amplifier is coupled to the photodiode through the pixel switch. A feedback capacitor and a reset switch are coupled between a first input port and an output port of the operational amplifier. A switched resistor network is coupled to the output port of the operational amplifier. A first switched capacitor network is coupled to the switched resistor network and samples a reset voltage. A second switched capacitor network is coupled to the switched resistor network and samples a signal voltage. A subtractor receives the reset voltage and the signal voltage, and generates a sample voltage. The second switched network comprises two or more capacitors.
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公开(公告)号:US09461628B2
公开(公告)日:2016-10-04
申请号:US14580388
申请日:2014-12-23
Applicant: Texas Instruments Incorporated
Inventor: Rahul Sharma , Nagesh Surendranath , Sandeep Kesrimal Oswal
IPC: H03F3/45 , H03K3/012 , H02M1/08 , H02M1/12 , H03K17/687 , H03H11/12 , H03H19/00 , G06G7/184 , G05F1/56 , G06G7/186
CPC classification number: H03K3/012 , G05F1/561 , G06G7/184 , G06G7/186 , H02M1/08 , H02M1/12 , H02M2001/123 , H03F3/082 , H03H11/1291 , H03H19/004 , H03K4/023 , H03K17/687
Abstract: Charge to voltage conversion integrator circuitry for data acquisition front-end and other applications to provide a single-ended up a voltage using an input bias capacitance and a switching circuit to selectively place an input transistor in a negative feedback configuration in a first mode to charge the input bias capacitance to a calibration voltage for compensating integrator amplifier bias circuitry, with the switching circuit connecting an input node and the input bias capacitance in a second mode to integrate the input current signal across a feedback capacitance to provide a single-ended output voltage with the input bias capacitance maintaining a zero voltage at the input node.
Abstract translation: 充电到电压转换积分电路,用于数据采集前端和其他应用,以提供使用输入偏置电容的单端上电压和开关电路,以在第一模式中将输入晶体管选择性地置于负反馈配置中以进行充电 将校准电压的输入偏置电容用于补偿积分放大器偏置电路,其中开关电路将输入节点和输入偏置电容连接在第二模式中,以将输入电流信号整合在反馈电容上以提供单端输出电压 输入偏置电容在输入节点保持零电压。
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