公开(公告)号：US10797689B2

公开(公告)日：2020-10-06

申请号：US16386991

申请日：2019-04-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Subrato Roy ,  Dattatreya Baragur Suryanarayana

IPC: H02M3/335 ,  H03K17/082 ,  H03K17/687 ,  H02M3/337

Abstract: An apparatus includes an output transistor device configured to control an output voltage of an output node in response to a control signal and an input voltage. A current sensor is configured to sense an output current supplied from the output node. A feedback converter is configured to convert the sensed output current to a feedback signal that tracks the output voltage of the output node. The feedback converter is further configured to set a clamping threshold. A gate control circuit is configured to generate the control signal in response to the feedback signal. The gate control circuit is configured to clamp the output voltage of the output node via the control signal based on the clamping threshold.

公开(公告)号：US10541525B1

公开(公告)日：2020-01-21

申请号：US16287458

申请日：2019-02-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Abhrarup Barman Roy ,  Abhishek Kumar ,  Subrato Roy ,  Ankur Chauhan ,  Abhinay Patil

IPC: G06F13/20 ,  G06F13/24 ,  H02H3/06 ,  H03K5/135 ,  H03K21/10 ,  H03K21/38 ,  H03K19/20

Abstract: The present disclosure relates to configuring parameters of a system. In some examples, a timer duration circuit can be configured to output a timer duration signal defining a time duration for a retry signal based on an impedance of a first circuit coupled at a first node. A logic circuit can be configured to control an output of the retry signal to at least one integrator circuit to control a current to a second node based on one of the timer duration signal and a retry timer signal, and a combination thereof. An output circuit can be configured to output a stop retry signal based on a voltage established by a second circuit at the second node based on its impedance and the current. The stop retry signal can indicate a number of retries that have occurred and can be based on the capacitances of the first and second circuits.

公开(公告)号：US10361695B2

公开(公告)日：2019-07-23

申请号：US16001518

申请日：2018-06-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ankur Chauhan ,  Sudheer Prasad ,  Md. Abidur Rahman ,  Subrato Roy

IPC: H03K3/00 ,  H03K17/082 ,  G01R19/00 ,  H01L23/525 ,  H03K17/687

Abstract: An apparatus includes: a first power transistor having a first current conduction path coupled between an input for receiving a supply voltage and a node and a first gate terminal coupled to a first gate control signal; a second power transistor having a second current conduction path coupled between the node and an output terminal for supplying a load current to a load; and a second gate terminal coupled to a second gate control signal; and a current sense transistor having a third gate terminal coupled to the first gate control signal, and outputting a sense current. The apparatus further includes: a differential amplifier having an output signal, and a feedback transistor having a gate terminal coupled to the output signal of the differential amplifier; and a resistor coupled between a monitor node and ground.

公开(公告)号：US20180123578A1

公开(公告)日：2018-05-03

申请号：US15341205

申请日：2016-11-02

Applicant: Texas Instruments Incorporated

Inventor： Ankur Chauhan ,  Sudheer Prasad ,  Md. Abidur Rahman ,  Subrato Roy

IPC: H03K17/082 ,  H03K17/687 ,  H01L23/525 ,  G01R19/00

CPC classification number: H03K17/0822 ,  G01R19/0092 ,  H01L23/5256 ,  H03K17/687 ,  H03K2217/0027 ,  H03K2217/0054

Abstract: An apparatus includes: a first power transistor having a first current conduction path coupled between an input for receiving a supply voltage and a node and a first gate terminal coupled to a first gate control signal; a second power transistor having a second current conduction path coupled between the node and an output terminal for supplying a load current to a load; and a second gate terminal coupled to a second gate control signal; and a current sense transistor having a third gate terminal coupled to the first gate control signal, and outputting a sense current. The apparatus further includes: a differential amplifier having an output signal, and a feedback transistor having a gate terminal coupled to the output signal of the differential amplifier; and a resistor coupled between a monitor node and ground.