Forming inter-device STI regions and intra-device STI regions using different dielectric materials
    22.
    发明授权
    Forming inter-device STI regions and intra-device STI regions using different dielectric materials 有权
    使用不同的介电材料形成器件间STI区和器件内部区域

    公开(公告)号:US08846466B2

    公开(公告)日:2014-09-30

    申请号:US14019338

    申请日:2013-09-05

    摘要: An integrated circuit structure includes a substrate having a first portion in a first device region and a second portion in a second device region; and two insulation regions in the first device region and over the substrate. The two insulation regions include a first dielectric material having a first k value. A semiconductor strip is between and adjoining the two insulation regions, with a top portion of the semiconductor strip forming a semiconductor fin over top surfaces of the two insulation regions. An additional insulation region is in the second device region and over the substrate. The additional insulation region includes a second dielectric material having a second k value greater than the first k value.

    摘要翻译: 集成电路结构包括具有第一器件区域中的第一部分和第二器件区域中的第二部分的衬底; 以及在第一器件区域和衬底上的两个绝缘区域。 两个绝缘区域包括具有第一k值的第一电介质材料。 半导体条在两个绝缘区之间并相邻,半导体条的顶部在两个绝缘区的顶表面上形成半导体鳍。 另外的绝缘区域位于第二器件区域和衬底之上。 附加绝缘区域包括具有大于第一k值的第二k值的第二电介质材料。

    Silicide formation and associated devices
    23.
    发明授权
    Silicide formation and associated devices 有权
    硅化物形成和相关设备

    公开(公告)号:US08686516B2

    公开(公告)日:2014-04-01

    申请号:US13919459

    申请日:2013-06-17

    IPC分类号: H01L29/78

    摘要: Improved silicide formation and associated devices are disclosed. An exemplary semiconductor device includes a semiconductor substrate, a fin structure disposed over the semiconductor substrate and having spaced source and drain regions extending outwardly from a channel region, and a gate structure disposed on a portion of the fin structure, the gate structure engaging the fin structure adjacent to the channel region. The device also includes a first silicide layer disposed on the fin structure, the first silicide layer extending outwardly from the gate structure along a top portion of the source region and a second silicide layer disposed on the fin structure, the second silicide layer extending outwardly from the gate structure along a top portion of the drain region. Further, the device includes a source contact conductively coupled to the first silicide layer and a drain contact conductively coupled to the second silicide layer.

    摘要翻译: 公开了改进的硅化物形成和相关装置。 示例性的半导体器件包括半导体衬底,翅片结构,其设置在半导体衬底上并且具有从沟道区向外延伸的间隔的源极和漏极区域以及设置在鳍结构的一部分上的栅极结构,栅极结构接合翅片 结构邻近通道区域。 该器件还包括设置在散热片结构上的第一硅化物层,第一硅化物层沿着源极区的顶部从栅极结构向外延伸,以及设置在鳍状结构上的第二硅化物层,第二硅化物层从 沿着漏极区域的顶部的栅极结构。 此外,器件包括导电耦合到第一硅化物层的源极接触和与第二硅化物层导电耦合的漏极接触。

    IMPROVED SILICIDE FORMATION AND ASSOCIATED DEVICES
    24.
    发明申请
    IMPROVED SILICIDE FORMATION AND ASSOCIATED DEVICES 有权
    改进的硅胶形成和相关设备

    公开(公告)号:US20140001574A1

    公开(公告)日:2014-01-02

    申请号:US13919459

    申请日:2013-06-17

    IPC分类号: H01L29/78

    摘要: Improved silicide formation and associated devices are disclosed. An exemplary semiconductor device includes a semiconductor substrate, a fin structure disposed over the semiconductor substrate and having spaced source and drain regions extending outwardly from a channel region, and a gate structure disposed on a portion of the fin structure, the gate structure engaging the fin structure adjacent to the channel region. The device also includes a first silicide layer disposed on the fin structure, the first silicide layer extending outwardly from the gate structure along a top portion of the source region and a second silicide layer disposed on the fin structure, the second silicide layer extending outwardly from the gate structure along a top portion of the drain region. Further, the device includes a source contact conductively coupled to the first silicide layer and a drain contact conductively coupled to the second silicide layer.

    摘要翻译: 公开了改进的硅化物形成和相关装置。 示例性的半导体器件包括半导体衬底,翅片结构,其设置在半导体衬底上并且具有从沟道区向外延伸的间隔的源极和漏极区域以及设置在鳍结构的一部分上的栅极结构,栅极结构接合翅片 结构邻近通道区域。 该器件还包括设置在散热片结构上的第一硅化物层,第一硅化物层沿着源极区的顶部从栅极结构向外延伸,以及设置在鳍状结构上的第二硅化物层,第二硅化物层从 沿着漏极区域的顶部的栅极结构。 此外,器件包括导电耦合到第一硅化物层的源极接触和与第二硅化物层导电耦合的漏极接触。