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189 条记录 (耗时 0.03 秒)

    Semiconductor device
    23.
    发明申请
    Semiconductor device 有权

    公开(公告)号：US20070195582A1

    公开(公告)日：2007-08-23

    申请号：US11785553

    申请日：2007-04-18

    申请人： Takeshi Sakata ,  Kenichi Osada ,  Riichiro Takemura ,  Hideyuki Matsuoka

    发明人： Takeshi Sakata ,  Kenichi Osada ,  Riichiro Takemura ,  Hideyuki Matsuoka

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0004 ,  G11C8/06 ,  G11C8/10 ,  G11C13/0069 ,  G11C2213/79

    摘要： A phase change memory is provided with a write data register, an output data selector, a write address register, an address comparator and a flag register. Write data is not only written into a memory cell but also retained by the write data register until the next write cycle. If a read access occurs to that address before the next write cycle, data is read out from the register without reading the data from the memory cell array. Without elongating the cycle time, it is possible not only to use a long time to write data into a memory cell therein but also to make longer the interval between the time when a write operation is done and the time when the subsequent read operation is made from that memory cell. As a result, data can be written reliably.

    Semiconductor integrated device
    24.
    发明申请
    Semiconductor integrated device 有权
    半导体集成器件

    公开(公告)号：US20060203542A1

    公开(公告)日：2006-09-14

    申请号：US11341385

    申请日：2006-01-30

    申请人： Kenzo Kurotsuchi ,  Kiyoo Itoh ,  Norikatsu Takaura ,  Kenichi Osada

    发明人： Kenzo Kurotsuchi ,  Kiyoo Itoh ,  Norikatsu Takaura ,  Kenichi Osada

    IPC分类号： G11C11/00

    CPC分类号： G11C13/0069 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0061 ,  G11C2013/0047 ,  G11C2013/0073 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/79

    摘要： A semiconductor non volatile memory device capable of multiple write operations with high reliability is implemented. The memory device includes memory cells, each comprising a first electrode, a second electrode, and an information storage section put between the two electrodes, wherein an operation to feed a first pulse current from the first electrode to the second, and another operation to feed a second pulse current from the second electrode to the first. A segregation of composing elements of the information storage section is caused by applying the first pulse, however, the segregation of elements is resolved by applying the second pulse, and the composition of the element recovers to the original state.

    摘要翻译： 实现了具有高可靠性的多次写入操作的半导体非易失性存储器件。 存储器件包括存储单元，每个存储单元包括放置在两个电极之间的第一电极，第二电极和信息存储部分，其中将第一脉冲电流从第一电极馈送到第二电极的操作，以及另一个进给 从第二电极到第一电极的第二脉冲电流。 信息存储部分的组合元件的分离是通过施加第一脉冲引起的，然而，通过应用第二脉冲来解决元件的偏析，并且元件的组成恢复到原始状态。

    Semiconductor device
    26.
    发明申请
    Semiconductor device 有权

    公开(公告)号：US20060146634A1

    公开(公告)日：2006-07-06

    申请号：US11324357

    申请日：2006-01-04

    申请人： Kenichi Osada ,  Takayuki Kawahara

    发明人： Kenichi Osada ,  Takayuki Kawahara

    IPC分类号： G11C5/14 ,  G11C11/00

    CPC分类号： G11C13/0004 ,  G11C5/147 ,  G11C8/08 ,  G11C13/0028 ,  G11C2213/79

    摘要： To improve the reliability of the phase change element, unwanted current should not be flown into the element. Therefore, an object of the present invention is to provide a memory cell that stores information depending on a change in its state caused by applied heat, as well as an input/output circuit, and to turn off the word line until the power supply circuit is activated. According to the present invention, unwanted current flow to the element can be prevented and thereby data destruction can be prevented.

    Semiconductor device
    27.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US07038961B2

    公开(公告)日：2006-05-02

    申请号：US10754814

    申请日：2004-01-12

    申请人： Takeshi Sakata ,  Kenichi Osada ,  Riichiro Takemura ,  Hideyuki Matsuoka

    发明人： Takeshi Sakata ,  Kenichi Osada ,  Riichiro Takemura ,  Hideyuki Matsuoka

    IPC分类号： G11C7/00

    CPC分类号： G11C13/0004 ,  G11C8/06 ,  G11C8/10 ,  G11C13/0069 ,  G11C2213/79

    摘要： A phase change memory is provided with a write data register, an output data selector, a write address register, an address comparator and a flag register. Write data is not only written into a memory cell but also retained by the write data register until the next write cycle. If a read access occurs to that address before the next write cycle, data is read out from the register without reading the data from the memory cell array. Without elongating the cycle time, it is possible not only to use long time to write data into a memory cell therein but also to make longer the interval between the time when a write operation is done and the time when the subsequent read operation is made from that memory cell. As a result, data can be written reliably.

    摘要翻译： 相变存储器具有写入数据寄存器，输出数据选择器，写入地址寄存器，地址比较器和标志寄存器。 写数据不仅写入存储单元，而且由写数据寄存器保留，直到下一个写周期。 如果在下一个写周期之前对该地址进行读取访问，则从寄存器读出数据，而不从存储单元阵列中读取数据。 在不延长周期时间的情况下，不仅可以长时间地将数据写入其中的存储单元，而且可以使写入操作完成的时间与后续读取操作的时间之间的间隔变长 那个记忆体。 因此，可以可靠地写入数据。