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186 条记录 (耗时 0.055 秒)

    Semiconductor device and manufacturing method thereof
    21.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US07560734B2

    公开(公告)日：2009-07-14

    申请号：US11305212

    申请日：2005-12-19

    申请人： Koji Ono ,  Hideomi Suzawa ,  Tatsuya Arao

    发明人： Koji Ono ,  Hideomi Suzawa ,  Tatsuya Arao

    IPC分类号： H01L27/14

    CPC分类号： H01L27/1222 ,  G02F1/13624 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/127 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L33/08 ,  H01L33/62 ,  H01L2029/7863 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In a semiconductor device, typically an active matrix display device, the structure of TFTs arranged in the respective circuits are made suitable in accordance with the function of the circuit, and along with improving the operating characteristics and the reliability of the semiconductor device, the manufacturing cost is reduced and the yield is increased by reducing the number of process steps. A semiconductor device has a semiconductor layer, an insulating film formed contacting the semiconductor layer, and a gate electrode having a tapered portion on the insulating film, in the semiconductor device, the semiconductor layer has a channel forming region, a first impurity region for forming a source region or a drain region and containing a single conductivity type impurity element, and a second impurity region for forming an LDD region contacting the channel forming region, a portion of the second impurity region is formed overlapping a gate electrode, and the concentration of the single conductivity type impurity element contained in the second impurity region becomes larger with distance from the channel forming region.

    摘要翻译： 在半导体器件（通常为有源矩阵显示器件）中，根据电路的功能，布置在各个电路中的TFT的结构是合适的，并且随着半导体器件的工作特性和可靠性的提高，制造 降低成本，并通过减少工艺步骤的数量来提高产量。 半导体器件具有半导体层，与半导体层接触形成的绝缘膜和在绝缘膜上具有锥形部分的栅电极，在半导体器件中，半导体层具有沟道形成区，形成第一杂质区 源极区域或漏极区域，并且包含单一导电型杂质元素，以及用于形成与沟道形成区域接触的LDD区域的第二杂质区域，第二杂质区域的一部分与栅电极重叠，并且浓度 包含在第二杂质区域中的单一导电型杂质元素随着与沟道形成区域的距离而变大。

    Semiconductor device and method of fabricating the same
    23.
    发明申请
    Semiconductor device and method of fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：US20080179674A1

    公开(公告)日：2008-07-31

    申请号：US11976171

    申请日：2007-10-22

    申请人： Hideomi Suzawa ,  Koji Ono ,  Hideto Ohnuma ,  Hirokazu Yamagata ,  Shunpei Yamazaki

    发明人： Hideomi Suzawa ,  Koji Ono ,  Hideto Ohnuma ,  Hirokazu Yamagata ,  Shunpei Yamazaki

    IPC分类号： H01L27/12

    CPC分类号： G02F1/13454 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/78645 ,  H01L2029/7863

    摘要： TFTs arranged in various circuits have structures that are suited for circuit functions, in order to improve operation characteristics and reliability of the semiconductor device, to lower consumption of electric power, to decrease the number of steps, to lower the cost of production and to improve the yield. The gradient of concentration of impurity element for controlling the conduction type in the LDD regions 622 and 623 of the TFT is such that the concentration increases toward the drain region. For this purpose, a tapered gate electrode 607 and a tapered gate-insulating film 605 are formed, and the ionized impurity element for controlling the conduction type is added to the semiconductor layer through the gate-insulating film 605.

    摘要翻译： 布置在各种电路中的TFT具有适于电路功能的结构，以便提高半导体器件的操作特性和可靠性，降低电力消耗，减少步骤数量，降低生产成本和改善 产量。 用于控制TFT的LDD区域622和623中的导电类型的杂质元素的浓度梯度使得浓度朝着漏极区增加。 为此，形成锥形栅电极607和锥形栅极绝缘膜605，并且用于控制导电类型的电离杂质元件通过栅极绝缘膜605添加到半导体层。

    Semiconductor device and manufacturing method thereof
    27.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US07151015B2

    公开(公告)日：2006-12-19

    申请号：US09852672

    申请日：2001-05-11

    申请人： Hideomi Suzawa ,  Koji Ono ,  Toru Takayama ,  Tatsuya Arao ,  Shunpei Yamazaki

    发明人： Hideomi Suzawa ,  Koji Ono ,  Toru Takayama ,  Tatsuya Arao ,  Shunpei Yamazaki

    IPC分类号： H01L21/00 ,  H01L21/84

    CPC分类号： H01L27/124 ,  H01L21/32136 ,  H01L27/1214 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78684 ,  H01L2029/7863

    摘要： There has been a problem that the manufacturing process is complicated and the number of processes is increased when a TFT with an LDD structure or a TFT with a GOLD structure is formed. In a method of manufacturing a semiconductor device, after low concentration impurity regions (24, 25) are formed in a second doping process, a width of the low concentration impurity region which is overlapped with the third electrode (18c) and a width of the low concentration impurity region which is not overlapped with the third electrode can be freely controlled by a fourth etching process. Thus, in a region overlapped with the third electrode, a relaxation of electric field concentration is achieved and then a hot carrier injection can be prevented. And, in the region which is not overlapped with the third electrode, the off-current value can be suppressed.

    摘要翻译： 当形成具有LDD结构的TFT或具有GOLD结构的TFT时，存在制造过程复杂并且处理次数增加的问题。 在制造半导体器件的方法中，在第二掺杂工艺中形成低浓度杂质区（24,25）之后，与第三电极（18c）重叠的低浓度杂质区的宽度和 可以通过第四蚀刻工艺来自由地控制不与第三电极重叠的低浓度杂质区域。 因此，在与第三电极重叠的区域中，实现电场浓度的松弛，然后可以防止热载流子注入。 并且，在不与第三电极重叠的区域中，可以抑制截止电流值。