公开(公告)号：US20120112344A1

公开(公告)日：2012-05-10

申请号：US13383895

申请日：2010-06-25

申请人： Akinobu Shibuya ,  Akira Ouchi

发明人： Akinobu Shibuya ,  Akira Ouchi

IPC分类号： H01L23/498 ,  H01L21/56

CPC分类号： H01L21/563 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/498 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01004 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/0242 ,  H05K1/0243 ,  H05K2201/09736 ,  H05K2201/09845 ,  H05K2201/10674 ,  H01L2924/00

摘要： Disclosed is a substrate for a semiconductor package in which leakage of radiation noise from a gap between a semiconductor element and a mounting substrate can be prevented. The substrate for the semiconductor package includes a coplanar waveguide including a signal and ground electrodes on the mounting substrate, the signal electrode flip-chip connected to the semiconductor element, the ground electrodes arranged on both sides of the signal electrode with intervals therebetween. A step part is formed in the ground electrodes in an outer circumferential part of a mounting region of the semiconductor element, the step part having a larger distance between upper surfaces of the mounting substrate and the ground electrode in the outer circumferential part of the mounting region than such distance in the mounting region, and an insulator for covering the signal electrode in the outer circumferential part of the mounting region is formed.

摘要翻译： 公开了一种用于半导体封装的衬底，其中可以防止辐射噪声从半导体元件和安装衬底之间的间隙泄漏。 用于半导体封装的衬底包括共面波导，其包括安装衬底上的信号和接地电极，连接到半导体元件的信号电极倒装芯片，布置在信号电极的两侧上的接地电极，间隔。 在半导体元件的安装区域的外周部的接地电极中形成台阶部，台阶部在安装基板的上表面与安装区域的外周部的接地电极之间具有较大的距离 形成安装区域的距离，并且形成用于覆盖安装区域的外周部分中的信号电极的绝缘体。

公开(公告)号：US06331811B2

公开(公告)日：2001-12-18

申请号：US09326878

申请日：1999-06-07

申请人： Akinobu Shibuya ,  Koji Matsui

发明人： Akinobu Shibuya ,  Koji Matsui

IPC分类号： H01K1012

CPC分类号： H01C7/006 ,  H01C3/04 ,  H01C17/12 ,  H05K1/167 ,  H05K3/388 ,  H05K2201/0317 ,  H05K2203/0361

摘要： A thin-film resistor that enables a pattern to be simply formed by means of wet etching, that has an excellent resistance temperature characteristic, and that can be easily manufactured, and a method for manufacturing this thin-film resistor, as well as a wiring substrate with this thin-film resistor formed therein. A thin resistor film according to this invention has a structure in which crystal grains deposit in the matrix of amorphous titanium nitride. The thin resistor film is formed on a substrate. The crystal grains includes at least one of crystal titanium nitride and crystal titanium. The thin resistor film can be manufactured using a simple process and can provide a wide range of resistance values with a small tolerance and a temperature coefficient of resistance close to zero.

摘要翻译： 一种薄膜电阻器，其能够通过湿法蚀刻简单地形成图案，具有优异的电阻温度特性，并且可以容易地制造，以及制造该薄膜电阻器的方法以及布线 基板上形成有该薄膜电阻。 根据本发明的薄电阻膜具有其中晶粒沉积在非晶氮化钛基体中的结构。 薄电阻膜形成在基板上。 晶粒包括晶体氮化钛和晶体钛中的至少一种。 可以使用简单的工艺制造薄电阻膜，并且可以提供具有小公差和电阻温度系数接近于零的宽范围的电阻值。