公开(公告)号：US07105453B2

公开(公告)日：2006-09-12

申请号：US10783467

申请日：2004-02-20

申请人： Yi-Nan Chen ,  Tse-Yao Huang ,  Hui-Min Mao

发明人： Yi-Nan Chen ,  Tse-Yao Huang ,  Hui-Min Mao

IPC分类号： H01L21/302 ,  H01L21/3065

CPC分类号： H01L21/76844 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76897

摘要： A method of forming contact holes. A substrate on which a plurality of gate structures is formed is provided, wherein the gate structure comprises a gate, a gate capping layer, and a gate spacer. An insulating layer is formed on the gate structures and fills between the gate structures. The insulating layer is etched using the gate capping layers, the gate spacers, and the substrate as stop layers to form first contact holes between the gate structures to expose the substrate and the gate spacers and form second contact holes overlying each gate structure to expose the gate capping layers. A protective spacer is formed over each sidewall of the first contact holes and the second contact holes. The gate capping layer under each gate contact hole is etched using the protective spacer as a stop layer to expose the gate. The protective spacers are removed.

摘要翻译： 一种形成接触孔的方法。 提供形成有多个栅极结构的基板，其中栅极结构包括栅极，栅极覆盖层和栅极间隔物。 在栅极结构上形成绝缘层，并填充在栅极结构之间。 使用栅极覆盖层，栅极间隔物和衬底作为停止层来蚀刻绝缘层，以在栅极结构之间形成第一接触孔，以暴露衬底和栅极间隔物，并形成覆盖每个栅极结构的第二接触孔，以暴露出 门盖层。 在第一接触孔和第二接触孔的每个侧壁上形成保护隔离物。 在每个栅极接触孔下方的栅极覆盖层使用保护隔板作为停止层进行蚀刻，以露出栅极。 去除保护性间隔物。

公开(公告)号：US07005374B2

公开(公告)日：2006-02-28

申请号：US10740680

申请日：2003-12-22

申请人： Tse-Yao Huang ,  Yi-Nan Chen

发明人： Tse-Yao Huang ,  Yi-Nan Chen

IPC分类号： H01L21/4763

CPC分类号： H01L21/31144 ,  H01L21/76802 ,  H01L27/10888 ,  H01L27/10894

摘要： Disclosed is an improved method for forming contact holes. The method of the present invention includes the steps of providing a substrate; forming a plurality of operation layers on the substrate as necessary; forming a poly-silicon layer on the uppermost one of the operation layers; forming an anti-reflective layer on the poly-silicon layer; forming a photoresist layer on the anti-reflective layer to define the positions where the contact holes are to be formed; removing portions of the anti-reflective layer not covered with the photoresist layer; removing the photoresist layer; removing portions of the poly-silicon layer not covered with the anti-reflective layer; and using the residual poly-silicon layer as a mask to etch and form the contact holes. In the step of removing portions of the poly-silicon layer comprises partially removing portions of the poly-silicon not covered with the anti-reflective layer to form recesses, removing the anti-reflective layer, and opening the recesses of the poly-silicon to form openings.

摘要翻译： 公开了一种形成接触孔的改进方法。 本发明的方法包括提供基板的步骤; 根据需要在基板上形成多个操作层; 在最上面的一个操作层上形成多晶硅层; 在所述多晶硅层上形成抗反射层; 在抗反射层上形成光致抗蚀剂层以限定要形成接触孔的位置; 去除未被光致抗蚀剂层覆盖的抗反射层的部分; 去除光致抗蚀剂层; 去除未被抗反射层覆盖的多晶硅层的部分; 并使用剩余的多晶硅层作为掩模来蚀刻和形成接触孔。 在去除多晶硅层的部分的步骤中，包括部分地去除未被抗反射层覆盖的多晶硅的部分以形成凹部，去除抗反射层，并将多晶硅的凹部打开至 形成开口。

公开(公告)号：US06979638B2

公开(公告)日：2005-12-27

申请号：US10783014

申请日：2004-02-23

申请人： Tse-Yao Huang ,  Yi-Nan Chen ,  Chiang-Lin Shih

发明人： Tse-Yao Huang ,  Yi-Nan Chen ,  Chiang-Lin Shih

IPC分类号： H01L21/3213 ,  H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/32139 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76865 ,  H01L2221/1078

摘要： Disclosed is a method for forming conducting wire and contact opening in a semiconductor device. The method of the present invention utilizes the formation of metal regions as a mask for etching a conductive layer of the semiconductor device to remove unnecessary portions so as to form conducting wires. The method of the present invention can reduce the necessary thickness of photoresist and well control the via resistance.

摘要翻译： 公开了一种在半导体器件中形成导线和接触开口的方法。 本发明的方法利用金属区域的形成作为用于蚀刻半导体器件的导电层的掩模，以除去不需要的部分以形成导线。 本发明的方法可以减少必需的光致抗蚀剂厚度并且很好地控制通孔电阻。

公开(公告)号：US06974741B2

公开(公告)日：2005-12-13

申请号：US10751503

申请日：2004-01-06

申请人： Hsiu-Chun Lee ,  Tse-Yao Huang ,  Yi-Nan Chen

发明人： Hsiu-Chun Lee ,  Tse-Yao Huang ,  Yi-Nan Chen

IPC分类号： H01L21/308 ,  H01L21/762 ,  H01L21/8238

CPC分类号： H01L21/3081 ,  H01L21/3086 ,  H01L21/76224

摘要： Disclosed is a method for forming a shallow trench. The method of the present invention comprises steps of providing a substrate; forming a plurality of operation layers on the substrate; forming photoresist on the uppermost one of the operation layers to define a position to be etched; etching a portion of the operation layers at said position to form an opening; forming a spacing layer on the sidewall of the opening; and etching a portion of the substrate corresponding to the opening to form a shallow trench. By the etching method of the present invention, a striation phenomenon caused by the common mask etch is avoided.

公开(公告)号：US20050202671A1

公开(公告)日：2005-09-15

申请号：US10908824

申请日：2005-05-27

申请人： Tse-Yao Huang ,  Yi-Nan Chen ,  Chih-Ching Lin

发明人： Tse-Yao Huang ,  Yi-Nan Chen ,  Chih-Ching Lin

IPC分类号： H01L21/3205 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/76 ,  H01L21/768

CPC分类号： H01L21/7685 ,  H01L21/76802 ,  H01L21/76832 ,  H01L21/76837

摘要： A method for fabricating interconnects is provided. The method comprises forming a conducting line on a first dielectric layer; forming a first liner layer on the surfaces of the first dielectric layer and the conducting line; forming a second liner layer on the first liner layer; forming a second dielectric layer on the second liner layer, wherein the etching selectivity rate of the second dielectric layer is higher than the etching selectivity rate of the second liner; and patterning the second dielectric layer to form a contact window opening through the second liner layer and the first liner layer to expose the surface of the conducting line. Because the second dielectric layer having an etching rate higher than the etching rate of the second liner layer, the second liner layer can be used as an etch stop layer while patterning the second dielectric layer.

摘要翻译： 提供一种用于制造互连的方法。 该方法包括在第一电介质层上形成导线; 在所述第一介电层和所述导电线的表面上形成第一衬里层; 在所述第一衬里层上形成第二衬里层; 在所述第二衬里层上形成第二电介质层，其中所述第二电介质层的蚀刻选择率高于所述第二衬垫的蚀刻选择率; 以及图案化所述第二电介质层以形成穿过所述第二衬垫层和所述第一衬里层的接触窗口，以露出所述导电线的表面。 由于第二电介质层的蚀刻速率高于第二衬垫层的蚀刻速率，所以第二衬里层可以用作蚀刻停止层，同时构图第二介电层。

公开(公告)号：US20050186775A1

公开(公告)日：2005-08-25

申请号：US10783014

申请日：2004-02-23

申请人： Tse-Yao Huang ,  Yi-Nan Chen ,  Chiang-Lin Shih

发明人： Tse-Yao Huang ,  Yi-Nan Chen ,  Chiang-Lin Shih

IPC分类号： H01L21/3213 ,  H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/32139 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76865 ,  H01L2221/1078

摘要： Disclosed is a method for forming conducting wire and contact opening in a semiconductor device. The method of the present invention utilizes the formation of metal regions as a mask for etching a conductive layer of the semiconductor device to remove unnecessary portions so as to form conducting wires. The method of the present invention can reduce the necessary thickness of photoresist and well control the via resistance.

摘要翻译： 公开了一种在半导体器件中形成导线和接触开口的方法。 本发明的方法利用金属区域的形成作为用于蚀刻半导体器件的导电层的掩模，以除去不需要的部分以形成导线。 本发明的方法可以减少必需的光致抗蚀剂厚度并且很好地控制通孔电阻。

公开(公告)号：US06884714B2

公开(公告)日：2005-04-26

申请号：US10612859

申请日：2003-07-03

申请人： Tse-Yao Huang ,  Yi-Nan Chen ,  Chung-Peng Hao

发明人： Tse-Yao Huang ,  Yi-Nan Chen ,  Chung-Peng Hao

IPC分类号： H01L21/762 ,  H01L21/4763

CPC分类号： H01L21/76232

摘要： A method of forming shallow trench isolation with chamfered corners. First, a pad insulating layer, a first mask layer, and a second mask layer are sequentially formed on a substrate. The second mask layer, the first mask layer, and the pad insulating layer are patterned to form an opening exposing a portion of the substrate. Next, the substrate is etched using the patterned second mask layer as a mask to form a trench therein. Next, part of the second mask layer is removed to expose the first mask layer adjacent to the trench and result in the second mask layer having a tapered profile. Finally, the second mask layer, the first mask layer, the pad insulating layer, and the substrate are etched along the tapered profile of the second mask layer to chamfer corners of the trench.

摘要翻译： 形成具有倒角的浅沟槽隔离的方法。 首先，在衬底上依次形成衬垫绝缘层，第一掩模层和第二掩模层。 对第二掩模层，第一掩模层和焊盘绝缘层进行图案化以形成露出衬底的一部分的开口。 接下来，使用图案化的第二掩模层作为掩模蚀刻衬底，以在其中形成沟槽。 接下来，去除第二掩模层的一部分以暴露与沟槽相邻的第一掩模层，并导致第二掩模层具有锥形轮廓。 最后，沿着第二掩模层的锥形轮廓蚀刻第二掩模层，第一掩模层，焊盘绝缘层和衬底以倒角沟槽的角部。

公开(公告)号：US06835653B1

公开(公告)日：2004-12-28

申请号：US10605213

申请日：2003-09-16

申请人： Tse-Yao Huang ,  Yi-Nan Chen

发明人： Tse-Yao Huang ,  Yi-Nan Chen

IPC分类号： H01L214763

CPC分类号： H01L21/76897 ,  H01L21/76802 ,  H01L21/76829

摘要： A method of forming adjacent holes on a semiconductor substrate. The adjacent holes are separated by a fine line structure. The method includes the steps of providing a semiconductor substrate with an insulating layer on the substrate, forming a step-shaped structure, with a first horizontal surface, a second horizontal surface, and a vertical surface, on the surface of the insulating layer, depositing a sacrificial layer with an average thickness, forming a patterned photoresist layer on portions of the first and second horizontal surface, performing an etch-back process to remove the sacrificial layer not covered by the photoresist layer and forming a spacer on the vertical surface, removing the patterned photoresist layer, and using the spacer and the remaining sacrificial layer as a hard mask to remove the insulating layer, thereby forming two adjacent holes.

摘要翻译： 一种在半导体衬底上形成相邻孔的方法。 相邻的孔被细线结构分开。 该方法包括以下步骤：在衬底上提供具有绝缘层的半导体衬底，在绝缘层的表面上形成具有第一水平表面，第二水平表面和垂直表面的阶梯形结构，沉积 具有平均厚度的牺牲层，在第一和第二水平表面的部分上形成图案化的光致抗蚀剂层，执行回蚀工艺以去除未被光致抗蚀剂层覆盖的牺牲层并在垂直表面上形成隔离物，去除 图案化的光致抗蚀剂层，并且使用间隔物和剩余的牺牲层作为硬掩模以去除绝缘层，从而形成两个相邻的孔。

公开(公告)号：US06790765B1

公开(公告)日：2004-09-14

申请号：US10720275

申请日：2003-11-25

申请人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hui-Min Mao

发明人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hui-Min Mao

IPC分类号： H01L214763

CPC分类号： H01L21/76897 ,  H01L27/1052 ,  H01L27/11521

摘要： A method for forming contacts on a semiconductor device is provided. The method includes steps of forming an opening on a gate contact area, depositing a dielectric layer on a bit-line contact area and the opening, coating a photoresist to etch the dielectric layer, removing the photoresist and finally forming a conductive layer on a bit-line contact opening and a gate contact opening.

摘要翻译： 提供了一种用于在半导体器件上形成接触的方法。 该方法包括以下步骤：在栅极接触区域上形成开口，在位线接触区域上沉积介电层和开口，涂覆光致抗蚀剂以蚀刻电介质层，去除光致抗蚀剂并最终在一个位上形成导电层 线接触开口和门接触开口。

公开(公告)号：US20130071790A1

公开(公告)日：2013-03-21

申请号：US13233039

申请日：2011-09-15

申请人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hsien-Wen Liu

发明人： Tse-Yao Huang ,  Yi-Nan Chen ,  Hsien-Wen Liu

IPC分类号： G03F7/20

CPC分类号： G03F7/094 ,  G03F7/095 ,  G03F7/32 ,  G03F7/38 ,  H01L21/0275 ,  H01L21/0277 ,  H01L21/32139

摘要： A method of forming an etch mask includes: providing a substrate having thereon a material layer to be etched; forming a hard mask layer consisting of a radiation-sensitive, single-layer resist material on the material layer; exposing the hard mask layer to actinic energy to change solvent solubility of exposed regions of the hard mask layer; and subjecting the hard mask layer to water treatment to remove the exposed regions of the hard mask layer, thereby forming a masking pattern consisting of unexposed regions of the hard mask layer.

摘要翻译： 形成蚀刻掩模的方法包括：提供其上具有要蚀刻的材料层的基板; 在材料层上形成由辐射敏感的单层抗蚀剂材料组成的硬掩模层; 将硬掩模层暴露于光化能以改变硬掩模层的暴露区域的溶剂溶解度; 并对硬掩模层进行水处理以除去硬掩模层的暴露区域，从而形成由硬掩模层的未曝光区域构成的掩模图案。