公开(公告)号：US06358119B1

公开(公告)日：2002-03-19

申请号：US09336808

申请日：1999-06-21

申请人： Tsu Shih ,  Jih-Churng Twu ,  Ying-Ho Chen ,  Syun-Ming Jang

发明人： Tsu Shih ,  Jih-Churng Twu ,  Ying-Ho Chen ,  Syun-Ming Jang

IPC分类号： B24B100

CPC分类号： B24B37/12 ,  B24B37/015 ,  B24B55/02

摘要： The invention provides a method and an apparatus that prevent the accumulation of copper ions during CMP of copper lines by performing the CMP process at low temperatures and by maintaining this low temperature during the CMP process by adding a slurry that functions as a corrosion inhibitor.

摘要翻译： 本发明提供了一种方法和装置，其通过在低温下进行CMP工艺，并且通过添加用作腐蚀抑制剂的浆料在CMP工艺期间保持该低温来防止铜线的CMP中的铜离子的累积。

公开(公告)号：US6153526A

公开(公告)日：2000-11-28

申请号：US320758

申请日：1999-05-27

申请人： Tsu Shih ,  Jih-Churng Twu

发明人： Tsu Shih ,  Jih-Churng Twu

IPC分类号： H01L21/3105 ,  H01L21/321 ,  H01L21/00

CPC分类号： H01L21/31053 ,  H01L21/3212

摘要： A new method for removing particle residue from the surface of semiconductor wafers that contain wolfram plugs. A series of polishing and buffing steps is performed; the first of this is a wolfram CMP using a hard polishing pad. An oxide buffing operation is further performed on the wafer surface; a soft pad is used for this buffing operation. The buffing operation is followed by a wolfram CMP that is applied for a short period of time using a soft polishing pad thereby removing the protruding top of the wolfram plug and the oxide particles from the vicinity of the wolfram plugs.

摘要翻译： 一种从包含钨丝塞的半导体晶片表面去除颗粒残留物的新方法。 进行一系列抛光和抛光步骤; 第一个是使用硬抛光垫的钨粉CMP。 在晶片表面上进一步进行氧化物抛光操作; 一个软垫用于这种抛光操作。 抛光操作之后是使用软抛光垫施加短时间的钨粉CMP，从而从钨粉塞附近除去钨骨塞的突出顶部和氧化物颗粒。

公开(公告)号：US6020263A

公开(公告)日：2000-02-01

申请号：US742229

申请日：1996-10-31

申请人： Tsu Shih ,  Chen-Hua Yu

发明人： Tsu Shih ,  Chen-Hua Yu

IPC分类号： H01L23/544 ,  H01L21/64

CPC分类号： H01L23/544 ,  H01L2223/5442 ,  H01L2223/54453 ,  H01L2924/0002

摘要： This invention describes a method of forming alignment marks which will be preserved after contact holes in a dielectric have been filled with barrier metal and contact metal and the wafer has been planarized. The alignment marks are formed by filling alignment lines, formed in the dielectric when the contact holes are formed, with barrier metal and contact metal. The alignment lines and contact holes are filled with metal at the same time. After the wafer has been planarized, using a method such as chemical mechanical polishing, a small thickness of the dielectric is etched back using vertical dry anisotropic etching which will not remove either the contact metal or barrier metal. This leaves barrier metal and contact metal extending above the plane of the dielectric forming alignment marks. These alignment marks are preserved after subsequent processing steps, such as deposition of a layer of electrode metal.

摘要翻译： 本发明描述了一种形成对准标记的方法，其将在电介质中的接触孔填充有阻挡金属和接触金属并且晶片已被平坦化之后被保留。 通过在形成接触孔时在电介质中形成的对准线填充有阻挡金属和接触金属，形成对准标记。 对准线和接触孔同时被金属填充。 在晶片平坦化之后，使用诸如化学机械抛光的方法，使用不会去除接触金属或阻挡金属的垂直干燥各向异性蚀刻来回蚀电介质的小厚度。 这使得阻挡金属和接触金属在电介质成形对准标记的平面之上延伸。 这些对准标记在后续处理步骤之后被保留，例如沉积一层电极金属。

公开(公告)号：US06833323B2

公开(公告)日：2004-12-21

申请号：US10354710

申请日：2003-01-29

申请人： Chen-Hua Yui ,  Tsu Shih

发明人： Chen-Hua Yui ,  Tsu Shih

IPC分类号： H01L21302

CPC分类号： H01L21/3212 ,  H01L21/7684

摘要： A method for preventing peeling of a metal layer formed over a semiconductor wafer process surface during a chemical mechanical polishing (CMP) process including providing a semiconductor wafer having a process surface comprising a periphery portion and a central portion said central portion including active areas having semiconductor devices features formed therein the process surface including a dielectric insulating layer; forming a plurality of openings in the periphery portion to form closed communication with the dielectric insulating layer the plurality of openings having an aspect ratio of at least 2; blanket depositing a metal layer to cover the process surface including the periphery portion to include filling the plurality of openings to anchor the metal layer; and, performing a CMP process to remove at least a portion of the metal layer from the process surface.

摘要翻译： 一种用于在化学机械抛光（CMP）工艺过程中防止在半导体晶片工艺表面上形成的金属层的剥离的方法，包括提供具有包括周边部分和中心部分的工艺表面的半导体晶片，所述中间部分包括具有半导体的有源区域 在其中形成的处理表面的器件特征包括介电绝缘层; 在所述周边部分中形成多个开口以与所述电介质绝缘层形成与所述多个开口具有至少2的纵横比的闭合连通; 毯子沉积金属层以覆盖包括周边部分的处理表面，以包括填充多个开口以锚定金属层; 以及执行CMP处理以从处理表面去除金属层的至少一部分。

公开(公告)号：US06634930B1

公开(公告)日：2003-10-21

申请号：US09635013

申请日：2000-08-09

申请人： Ying-Ho Chen ,  Wen-Chih Chiou ,  Tsu Shih ,  Syun-Ming Jang ,  Chia-Ming Yang

发明人： Ying-Ho Chen ,  Wen-Chih Chiou ,  Tsu Shih ,  Syun-Ming Jang ,  Chia-Ming Yang

IPC分类号： B24B100

CPC分类号： B24B37/04 ,  B24B57/02

摘要： A method for preventing copper corrosion on a wafer during a chemical mechanical polishing process when the process is temporarily halted due to equipment malfunction and an apparatus for carrying out such method are disclosed. In the method, after the chemical mechanical polishing process is stopped for correcting equipment malfunction or any other processing problems, a cleaning solvent is sprayed toward the wafer surface to remove substantially all slurry solution from the surface to prevent corrosion of the copper layer, or other metal layer, by the slurry solution. The cleaning solvent may be sprayed from spray nozzles mounted around and juxtaposed to the polishing table onto which the polishing pad is mounted as long as the spray nozzles do not interfere with the rotation of the polishing pad.

摘要翻译： 本发明公开了一种在化学机械抛光工艺中由于设备故障暂时停止处理而在晶片上进行铜腐蚀的方法及其实施方法。 在该方法中，在化学机械抛光处理停止以纠正设备故障或任何其它处理问题之后，向晶片表面喷射清洗溶剂，以从表面去除基本上所有的浆液，以防止铜层或其它 金属层，通过浆料溶液。 只要喷嘴不干扰抛光垫的旋转，清洁溶剂可以从安装在其周围的喷嘴喷射并且并列在抛光台上，抛光垫安装在抛光台上。

公开(公告)号：US06620725B1

公开(公告)日：2003-09-16

申请号：US09395287

申请日：1999-09-13

申请人： Shau-Lin Shue ,  Ming-Hsing Tsai ,  Wen-Jye Tsai ,  Ying-Ho Chen ,  Tsu Shih ,  Jih-Churng Twu ,  Syun-Ming Jang

发明人： Shau-Lin Shue ,  Ming-Hsing Tsai ,  Wen-Jye Tsai ,  Ying-Ho Chen ,  Tsu Shih ,  Jih-Churng Twu ,  Syun-Ming Jang

IPC分类号： H01L214763

CPC分类号： H01L21/7684 ,  H01L21/3212

摘要： A process for performing CMP in two steps is described. After trenches have been formed and over-filled with copper, in a first embodiment of the invention a hard pad is used initially to remove most of the copper until a point is reached where dishing effects would begin to appear. A soft pad is then substituted and CMP continued until all copper has been removed, except in the trenches. In a second embodiment, CMP is initiated using a pad to which high-pressure is applied and which rotates relatively slowly. As before, this combination is used until the point is reached where dishing effects would begin to appear. Then, relatively low pressure in combination with relatively high rotational speed is used until all copper has been removed, except in the trenches. Both of these embodiments result in trenches which are just-filled with copper, with little or no dishing effects, and with all traces of copper removed everywhere except in the trenches themselves.

摘要翻译： 描述用于在两个步骤中执行CMP的过程。 在沟槽已经形成并且用铜过度填充之后，在本发明的第一实施例中，最初使用硬焊盘去除大部分铜，直到达到一个点，其中凹陷效应将开始出现。 然后取代软焊盘，继续CMP直到除了沟槽中除去所有的铜。 在第二实施例中，使用施加高压并且相对缓慢地旋转的衬垫来启动CMP。 如前所述，使用这种组合，直到达到点，其中凹陷效应将开始出现。 然后，除了沟槽之外，使用相对较低的压力结合相对高的转速直到除去所有的铜。 这两个实施例都导致刚好填充铜的沟槽，几乎没有凹陷效应，并且除了沟槽本身之外，所有痕迹的铜都被去除。

公开(公告)号：US06589852B1

公开(公告)日：2003-07-08

申请号：US10154463

申请日：2002-05-23

申请人： Tsu Shih ,  Sung-Ming Jang

发明人： Tsu Shih ,  Sung-Ming Jang

IPC分类号： H01L2176

CPC分类号： H01L23/544 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for avoiding a step height over an alignment mark area including providing at least one alignment mark area disposed at a semiconductor wafer process surface periphery said alignment mark area having alignment marks anisotropically etched into the semiconductor wafer process surface; depositing a first insulating dielectric layer over an active area of the semiconductor wafer process surface to include covering the at least one alignment mark area; planarizing the first insulating dielectric layer; depositing a polysilicon layer over the active area of the semiconductor wafer process surface to include covering the at least one alignment mark area; and, anisotropically etching the polysilicon layer through a thickness over the at least one alignment mark area to form an opening extending no further than about the first insulating dielectric layer to minimize a step height.

摘要翻译： 一种用于避免对准标记区域上的台阶高度的方法，包括提供设置在半导体晶片工艺表面周围的至少一个对准标记区域，所述对准标记区域具有各向异性蚀刻到半导体晶片工艺表面中的对准标记; 在所述半导体晶片工艺表面的有效区域上沉积第一绝缘介电层以包括覆盖所述至少一个对准标记区域; 平面化第一绝缘介电层; 在所述半导体晶片工艺表面的有源区上沉积多晶硅层以包括覆盖所述至少一个对准标记区域; 并且通过所述至少一个对准标记区域上的厚度各向异性地蚀刻所述多晶硅层，以形成不超过所述第一绝缘介电层延伸的开口，以使台阶高度最小化。

公开(公告)号：US06518166B1

公开(公告)日：2003-02-11

申请号：US09839700

申请日：2001-04-23

申请人： Sheng Hsiung Chen ,  Shun Long Chen ,  Hungtse Lin ,  Frank Hsu ,  Tsu Shih

发明人： Sheng Hsiung Chen ,  Shun Long Chen ,  Hungtse Lin ,  Frank Hsu ,  Tsu Shih

IPC分类号： H01L214763

CPC分类号： H01L21/76831 ,  H01L21/316 ,  H01L21/76808

摘要： A process for forming a dual damascene opening, in a composite layer comprised with low k layers, to accommodate a dual damascene type, copper structure, has been developed. The process features the use of a silicon oxide layer, formed on the surfaces of the composite layer, exposed in the narrow diameter, via hole component of the dual damascene opening. The silicon oxide layer prevents via poisoning, or outgassing of amines or hydroxyls from the low k layers exposed in the via hole opening, that can evolve during a subsequent photolithographic development cycle, used to define the trench shape component of the dual damascene opening. The protective silicon oxide layer is conformally formed on the exposed-surfaces of the via hole component, via a liquid phase deposition procedure, performed at room temperature.

摘要翻译： 已经开发了在包含低k层的复合层中形成双镶嵌开口以适应双镶嵌型铜结构的方法。 该方法的特征在于使用形成在复合层的表面上的氧化硅层，其暴露在双重镶嵌开口的窄直径通孔部分中。 氧化硅层防止通过中毒或从在通孔开口中暴露的低k层的胺或羟基脱气，其可以在随后的光刻显影循环期间放出，用于限定双镶嵌开口的沟槽形状分量。 保护性氧化硅层通过在室温下进行的液相沉积程序在通孔部件的暴露表面上共形地形成。

公开(公告)号：US06417106B1

公开(公告)日：2002-07-09

申请号：US09431150

申请日：1999-11-01

申请人： Jih-Churng Twu ,  Ying-Ho Chen ,  Tsu Shih ,  Syun-Ming Jang

发明人： Jih-Churng Twu ,  Ying-Ho Chen ,  Tsu Shih ,  Syun-Ming Jang

IPC分类号： H01L21302

CPC分类号： H01L21/7684 ,  H01L21/76829

摘要： A process for reducing dishing in damascene structures formed in low k organic dielectrics is described. A key feature is the insertion of a liner layer between the low k dielectric layer and the etch stop layer. The only requirement for the liner material is that it should have different etching characteristics from the etch stop material so that when trenches are etched in the dielectric they extend as far as the etch stop layer, in the normal way. When this is done it is found that dishing, after CMP, is significantly reduced, particularly for trench structures made up of multiple narrow trenches spaced close together.

摘要翻译： 描述了一种用于减少在低k有机电介质中形成的镶嵌结构中的凹陷的方法。 一个关键特征是在低k电介质层和蚀刻停止层之间插入衬里层。 衬垫材料的唯一要求是它应该具有与蚀刻停止材料不同的蚀刻特性，使得当在电介质中蚀刻沟槽时，它们以正常方式延伸到蚀刻停止层的最远处。 当这样做时，发现在CMP之后的凹陷显着减少，特别是对于由几个间隔得很近的窄沟槽组成的沟槽结构。

公开(公告)号：US06227947B1

公开(公告)日：2001-05-08

申请号：US09366231

申请日：1999-08-03

申请人： Tien-Chen Hu ,  Jih-Churng Twu ,  Ying-Ho Chen ,  Tsu Shih

发明人： Tien-Chen Hu ,  Jih-Churng Twu ,  Ying-Ho Chen ,  Tsu Shih

IPC分类号： B24B100

CPC分类号： B24B53/017 ,  B24B53/013

摘要： An apparatus and a method for chemical mechanical polishing a metal on a semiconductor wafer capable of achieving improved pad life are disclosed. In the apparatus, in addition to a first spray nozzle used for spraying a slurry solution onto the top of a polishing pad, a second spray nozzle is provided for mounting juxtaposed to a conditioning pad for dispensing a cleaning solution capable of dissolving polishing debris formed on the polishing pad surface. The apparatus may further include at least one cleaning solution reservoir for storing and delivering a cleaning solution to the second spray nozzle. The method can be advantageously carried out in two-steps during which a first cleaning solution is sprayed onto the pad surface for dissolving the polishing debris, and then a second cleaning solution is sprayed onto the pad surface for removing or flushing away the dissolved debris. In one illustration for the removal of oxides of copper, an acid-containing or ammonium hydroxide-containing cleaning solution is used advantageously to dissolve the oxides, and then deionized water is used to remove the dissolved debris from the pad surface.

摘要翻译： 公开了一种用于化学机械抛光半导体晶片上的能够实现改善的焊盘寿命的装置和方法。 在该装置中，除了用于将浆液溶液喷洒到抛光垫的顶部上的第一喷嘴之外，还提供了第二喷嘴，用于与调节垫并置安装，用于分配能够溶解在 抛光垫表面。 该设备还可以包括至少一个清洁溶液储存器，用于将清洁溶液存储并输送到第二喷嘴。 该方法可以有利地在两个步骤中进行，在此期间将第一清洁溶液喷涂到垫表面上用于溶解抛光碎片，然后将第二清洁溶液喷涂到垫表面上以除去或冲洗掉溶解的碎屑。 在一个说明中，为了去除铜的氧化物，含有酸或氢氧化铵的清洗溶液有利地用于溶解氧化物，然后使用去离子水从衬垫表面去除溶解的碎屑。