摘要:
An object of the present invention is to provide a user authentication method and system, an information terminal device and a service providing server, a subject identification method and system, a correspondence confirmation method and system, an object confirmation method and system, which are capable of assuring authentication and/or confirmation of a person, an animal and a plant, or an object and improving precision thereof, and program products for them. In order to perform user authentication when a user of an information terminal device 30 such as a cellular phone or the like receives a service from a service providing server 20 via a network, iris authentication is performed, and a password is automatically updated every time a service is provided to generate a new password to be used when a next service is provided, and the new password is stored in both the information terminal device 30 and the service providing server 20.
摘要:
A memory array divided into a plurality of sub-memory-arrays is disposed on a chip so that, if a specified sub-memory-array is selected by a sub-memory-array selecting circuit, a normal read/write operation is performed with respect to the sub-memory-array based on an address indicated by a group of external address signals. At the same time, a clock generator for self-refresh mounted on a chip generates a word-line basic clock for self-refresh and a word-line basic clock for refresh, thereby selecting the word lines in the sub-memory-arrays which have not been selected. Prior to a predetermined time at which the sub-memory-array subjected to a refresh operation is subsequently selected, a refresh halt signal is outputted so as to forcibly halt the refresh operation, thereby preventing insufficient recharging of a memory cell. Each of the plurality of sub-memory-arrays stores, of sequential sets of image data, data on one frame or one field.
摘要:
A memory array divided into a plurality of sub-memory-arrays is disposed on a chip so that, if a specified sub-memory-array is selected by a sub-memory-array selecting circuit, a normal read/write operation is performed with respect to the sub-memory-array based on an address indicated by a group of external address signals. At the same time, a clock generator for self-refresh mounted on a chip generates a word-line basic clock for self-refresh and a word-line basic clock for refresh, thereby selecting the word lines in the sub-memory-arrays which have not been selected. Prior to a predetermined time at which the sub-memory-array subjected to a refresh operation is subsequently selected, a refresh halt signal is outputted so as to forcibly halt the refresh operation, thereby preventing insufficient recharging of a memory cell. Each of the plurality of sub-memory-arrays stores, of sequential sets of image data, data on one frame or one field.
摘要:
A method for filling a contact hole in which (i) a silicon dioxide layer is formed on a silicon substrate; (ii) a contact hole is formed in the silicon dioxide layer; (iii) polysilicon film is formed on the side and bottom surface portions of the contact hole; (iv) gas containing tungsten reacts with the film; and (v) the contact hole is filled up with tungsten.
摘要:
In a semiconductor IC, a vertical pnp or npn transistor of a uniform characteristic and a high breakdown voltage is made by forming, for example, a p.sup.- -collector region (39) in an n-type epitaxial region, an n-well base region (41) formed in the p.sup.- -collector region (39) and a p-emitter region (42) formed in the n-well base region (41); and furthermore, for example as shown in FIG. 9, p.sup.- -regions (40) and (49) are formed simultaneously with the p.sup.- -collector region (39) and an n-region (53) is formed simultaneously with the n-well base region (41), thereby constituting IIL of superior characteristics and a high resistance device at the same time as forming of the vertical transistor without substantial increase of manufacturing steps; and in the similar way, by combining the p.sup.- -region and n-region formed in the above-mentioned simultaneous steps with other region formed simultaneously with the forming of the vertical transistor, high h.sub.FE transistor, high speed vertical npn transistor, cross-over devices, p-channel and/or n-channel MOS transistors can be formed within limited manufacturing steps.
摘要:
A method of making at a relatively low temperature, a resistor region of a high sheet resistance, solely or together with other circuit devices such as bipolar transistors in an IC chip, with the step of forming a buried resistor layer inside a semiconductor substrate at a predetermined depth by an ion implantation, wherein the resultant resistor region has a well-controlled high sheet resistance and the obtained bipolar transistors have a well-improved high frequency characteristics.
摘要:
A photoelectric device comprises a signal electrode, a layer of amorphous photoconductor containing 50 atomic percent or more of selenium and an N-type semiconductor layer made of a material selected from the group consisting of oxygen depletion type cerium oxide and oxygen depletion type lead oxide and disposed therebetween, which has a thickness greater than 8 nm and up to and including 500 nm and a Fermi level located within an energy range of 0.2 to 0.8 eV from the bottom of a conduction band.
摘要:
According to one embodiment, a substrate processing method is disclosed. The above method includes: grinding an outer edge portion on a back surface of a semiconductor wafer with a semiconductor element formed on its front surface with a first grindstone or blade to thereby form an annular groove; grinding a projecting portion on an inner side of the groove with a second grindstone to thereby form a recessed portion integrally with the groove on the back surface of the semiconductor wafer; and grinding a bottom surface of the recessed portion including a ground surface made by the second grindstone with a third grindstone.