公开(公告)号：US20160172200A1

公开(公告)日：2016-06-16

申请号：US14569794

申请日：2014-12-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： WEICHANG LIU ,  ZHEN CHEN ,  Shen-De Wang ,  Wei Ta ,  Yi-Shan Chiu ,  Yuan-Hsiang Chang ,  Chih-Chien Chang

IPC: H01L21/28

CPC classification number: H01L29/40117 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/42344 ,  H01L29/66825 ,  H01L29/7881

Abstract: A method for fabricating non-volatile memory device is disclosed. The method includes the steps of: providing a substrate having a stack structure thereon; performing a first oxidation process to form a first oxide layer on the substrate and the stack structure; etching the first oxide layer for forming a first spacer adjacent to the stack structure; performing a second oxidation process to form a second oxide layer on the substrate; forming a dielectric layer on the first spacer and the second oxide layer; and etching the dielectric layer for forming a second spacer.

Abstract translation: 公开了一种用于制造非易失性存储器件的方法。 该方法包括以下步骤：提供其上具有堆叠结构的衬底; 执行第一氧化工艺以在衬底和堆叠结构上形成第一氧化物层; 蚀刻用于形成邻近堆叠结构的第一间隔物的第一氧化物层; 执行第二氧化工艺以在所述衬底上形成第二氧化物层; 在所述第一间隔物和所述第二氧化物层上形成介电层; 并蚀刻用于形成第二间隔物的电介质层。

公开(公告)号：US20160163722A1

公开(公告)日：2016-06-09

申请号：US14596227

申请日：2015-01-14

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yuan-Hsiang Chang ,  Aaron Chen ,  JIANJUN YANG ,  Chih-Chien Chang

IPC: H01L27/115 ,  H01L29/66 ,  H01L21/321 ,  H01L21/28 ,  H01L21/02 ,  H01L21/3213 ,  H01L29/788 ,  H01L29/423

CPC classification number: H01L27/11521 ,  H01L27/11534 ,  H01L29/40114 ,  H01L29/42328 ,  H01L29/66825 ,  H01L29/788

Abstract: A non-volatile memory cell includes a substrate, an erase gate disposed on the substrate and having a top plane, two floating gates disposed respectively at both sides of the erase gate, two control gates disposed respectively on two floating gates, and two select gates disposed respectively at outer sides of the two floating gates, where the two select gates have tilted top planes which are symmetric to each other.

Abstract translation: 非易失性存储单元包括衬底，设置在衬底上的擦除栅极，具有顶面，分别设置在擦除栅极两侧的两个浮置栅极，分别设置在两个浮置栅极上的两个控制栅极和两个选择栅极 分别设置在两个浮动栅极的外侧，其中两个选择栅极具有彼此对称的倾斜顶部平面。