公开(公告)号：US09790088B2

公开(公告)日：2017-10-17

申请号：US14993105

申请日：2016-01-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Meng-Jia Lin ,  Yung-Hsiao Lee ,  Weng-Yi Chen ,  Shih-Wei Li ,  Chung-Hsien Liu

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00246 ,  B81B7/008 ,  B81B2201/0235 ,  B81B2201/0285 ,  B81B2203/0315 ,  B81B2207/012 ,  B81B2207/015 ,  B81C1/00571 ,  B81C2201/0132 ,  B81C2201/014

Abstract: A method of fabricating a MEMS structure includes providing a substrate comprising a logic element region and a MEMS region. Next, a logic element is formed within the logic element region. A nitrogen-containing material layer is formed to cover the logic element region and the MEMS region conformally. Then, part of the nitrogen-containing material layer within the MEMS region is removed to form at least one shrinking region. Subsequently, a dielectric layer is formed to cover the logic element region and MEMS region, and the dielectric layer fills in the shrinking region. After that, the dielectric layer is etched to form at least one releasing hole, wherein the shrinking region surrounds the releasing hole. Finally, the substrate is etched to form a chamber.

公开(公告)号：US20170210615A1

公开(公告)日：2017-07-27

申请号：US15003913

申请日：2016-01-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yuan-Sheng Lin ,  Weng-Yi Chen ,  Kuan-Yu Wang ,  Chih-Wei Liu

IPC: B81B3/00 ,  H04R19/00 ,  B81C1/00

CPC classification number: B81B3/0075 ,  B81B2201/0257 ,  B81B2207/115 ,  B81C1/00158 ,  B81C1/00785 ,  H04R19/005 ,  H04R19/04 ,  H04R2201/003 ,  H04R2307/027

Abstract: A micro-electro-mechanical (MEMS) structure and a method for forming the same are disclosed. The MEMS structure includes a sacrificial layer, a lower dielectric film, an upper dielectric film, a plurality of through holes and a protective film. The sacrificial layer comprises an opening. The lower dielectric film is on the sacrificial layer. The upper dielectric film is on the lower dielectric film. The plurality of through holes passes through the lower dielectric film and the upper dielectric film. The protective film covers side walls of the upper dielectric film and the lower dielectric film and a film interface between the lower dielectric film and the upper dielectric film.

公开(公告)号：US20170166441A1

公开(公告)日：2017-06-15

申请号：US14993105

申请日：2016-01-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Meng-Jia Lin ,  Yung-Hsiao Lee ,  Weng-Yi Chen ,  Shih-Wei Li ,  Chung-Hsien Liu

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00246 ,  B81B7/008 ,  B81B2201/0235 ,  B81B2201/0285 ,  B81B2203/0315 ,  B81B2207/012 ,  B81B2207/015 ,  B81C1/00571 ,  B81C2201/0132 ,  B81C2201/014

Abstract: A method of fabricating a MEMS structure includes providing a substrate comprising a logic element region and a MEMS region. Next, a logic element is formed within the logic element region. A nitrogen-containing material layer is formed to cover the logic element region and the MEMS region conformally. Then, part of the nitrogen-containing material layer within the MEMS region is removed to form at least one shrinking region. Subsequently, a dielectric layer is formed to cover the logic element region and MEMS region, and the dielectric layer fills in the shrinking region. After that, the dielectric layer is etched to form at least one releasing hole, wherein the shrinking region surrounds the releasing hole. Finally, the substrate is etched to form a chamber.