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公开(公告)号:US12103845B2
公开(公告)日:2024-10-01
申请号:US17075737
申请日:2020-10-21
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Jung-Hao Chang , Weng-Yi Chen
CPC classification number: B81C1/00801 , B81B7/0025 , H04R7/06 , H04R19/04 , H04R31/003 , B81B2201/0257 , B81B2203/0127 , B81B2203/0353 , H04R2201/003
Abstract: A micro electromechanical system (MEMS) includes a substrate, a semiconductor device and a protection wall. The substrate has a surface. The semiconductor device is disposed on the surface. The protection wall has a poly-silicon layer surrounding the semiconductor device and connecting to the surface.
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公开(公告)号:US20180208460A1
公开(公告)日:2018-07-26
申请号:US15448804
申请日:2017-03-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Te-Huang Chiu , Weng-Yi Chen , Kuan-Yu Wang
CPC classification number: B81C1/00246 , B81B7/0006 , B81B2201/0214 , B81B2201/0257 , B81B2203/0127 , B81B2203/0315 , B81B2203/0384 , B81B2203/0392 , B81B2203/04 , B81C2201/014 , B81C2203/0735 , B81C2203/0771
Abstract: A semiconductor structure and a manufacturing method for the same are disclosed. The semiconductor structure includes a MEMS region. The MEMS region includes a sensing membrane and a metal ring. The metal ring defines a cavity under the sensing membrane.
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公开(公告)号:US11345590B2
公开(公告)日:2022-05-31
申请号:US17097175
申请日:2020-11-13
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Fan Hu , Chia-Wei Lee , Chang-Sheng Hsu , Weng-Yi Chen
Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area; further includes a sensing electrode, a second TiO2-patterned portion, and a second Pt-patterned portion on the second TiO2-patterned portion in the sensing area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, a TiO2 layer formed on the IMD layer, a first TiO2-patterned portion and a first Pt-patterned portion.
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公开(公告)号:US20210061643A1
公开(公告)日:2021-03-04
申请号:US17097175
申请日:2020-11-13
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Fan Hu , Chia-Wei Lee , Chang-Sheng Hsu , Weng-Yi Chen
Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area; further includes a sensing electrode, a second TiO2-patterned portion, and a second Pt-patterned portion on the second TiO2-patterned portion in the sensing area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, a TiO2 layer formed on the IMD layer, a first TiO2-patterned portion and a first Pt-patterned portion.
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公开(公告)号:US20180027337A1
公开(公告)日:2018-01-25
申请号:US15246561
申请日:2016-08-25
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chang-Sheng Hsu , Weng-Yi Chen , En-Chan Chen , Shih-Wei Li , Guo-Chih Wei
CPC classification number: H04R17/025 , B81B3/0021 , B81B2201/0257 , B81B2203/0127 , B81B2203/0315 , B81C1/00158 , B81C2201/013 , H04R1/06 , H04R7/04 , H04R7/20 , H04R17/02 , H04R19/005 , H04R31/003 , H04R31/006 , H04R2201/003
Abstract: A piezoresistive microphone includes a substrate, an insulating layer, and a polysilicon layer. A first pattern is disposed within the polysilicon layer. The first pattern includes numerous first opening. A second pattern is disposed within the polysilicon layer. The second pattern includes numerous second openings. The first pattern surrounds the second pattern. Each first opening and each second opening are staggered. A first resistor is disposed in the polysilicon and between the first pattern and the second pattern. The first resistor is composed of numerous first heavily doped regions and numerous first lightly doped regions. The first heavily doped regions and the first lightly doped regions are disposed in series. The first heavily doped region and the first lightly doped region are disposed alternately. A cavity is disposed in the insulating layer and the substrate.
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公开(公告)号:US20170362081A1
公开(公告)日:2017-12-21
申请号:US15697467
申请日:2017-09-07
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Meng-Jia Lin , Yung-Hsiao Lee , Weng-Yi Chen , Shih-Wei Li , Chung-Hsien Liu
Abstract: A method of fabricating a MEMS structure includes providing a substrate comprising a logic element region and a MEMS region. Next, a logic element is formed within the logic element region. A nitrogen-containing material layer is formed to cover the logic element region and the MEMS region conformally. Then, part of the nitrogen-containing material layer within the MEMS region is removed to form at least one shrinking region. Subsequently, a dielectric layer is formed to cover the logic element region and MEMS region, and the dielectric layer fills in the shrinking region. After that, the dielectric layer is etched to form at least one releasing hole, wherein the shrinking region surrounds the releasing hole. Finally, the substrate is etched to form a chamber.
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公开(公告)号:US20200216304A1
公开(公告)日:2020-07-09
申请号:US16824153
申请日:2020-03-19
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chih-Fan Hu , Chia-Wei Lee , Chang-Sheng Hsu , Weng-Yi Chen
Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area; further includes a sensing electrode, a second TiO2-patterned portion, and a second Pt-patterned portion on the second TiO2-patterned portion in the sensing area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, a TiO2 layer formed on the IMD layer, a first TiO2-patterned portion and a first Pt-patterned portion.
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公开(公告)号:US10427935B2
公开(公告)日:2019-10-01
申请号:US16137914
申请日:2018-09-21
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Te-Huang Chiu , Weng-Yi Chen , Kuan-Yu Wang
Abstract: A manufacturing method for a semiconductor structure is disclosed. The semiconductor structure includes a MEMS region. The MEMS region includes a sensing membrane and a metal ring. The metal ring defines a cavity under the sensing membrane.
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公开(公告)号:US20190016591A1
公开(公告)日:2019-01-17
申请号:US16137914
申请日:2018-09-21
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Te-Huang Chiu , Weng-Yi Chen , Kuan-Yu Wang
CPC classification number: B81C1/00246 , B81B7/0006 , B81B2201/0214 , B81B2201/0257 , B81B2203/0127 , B81B2203/0315 , B81B2203/0384 , B81B2203/0392 , B81B2203/04 , B81C1/00428 , B81C2201/014 , B81C2203/0735 , B81C2203/0771
Abstract: A manufacturing method for a semiconductor structure is disclosed. The semiconductor structure includes a MEMS region. The MEMS region includes a sensing membrane and a metal ring. The metal ring defines a cavity under the sensing membrane.
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公开(公告)号:US20240425366A1
公开(公告)日:2024-12-26
申请号:US18809373
申请日:2024-08-20
Applicant: United Microelectronics Corp.
Inventor: Jung-Hao CHANG , Weng-Yi Chen
Abstract: A micro electromechanical system (MEMS) includes a substrate and a rear surface opposite to the surface, a semiconductor device and a protection wall. The substrate has a surface. The semiconductor device is disposed on the surface. The protection wall surrounds the semiconductor device and passes through the surface but not electrically contacts to the semiconductor device; wherein there is no electronic element disposed between the surface and the rear surface.
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