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公开(公告)号：US20220014221A1
公开(公告)日：2022-01-13
申请号：US17384518
申请日：2021-07-23
Applicant: pSemi Corporation
Inventor： Rong Jiang , Khushali Shah , Peter Bacon
Abstract: A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
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公开(公告)号：US20190140624A1
公开(公告)日：2019-05-09
申请号：US16240483
申请日：2019-01-04
Applicant: pSemi Corporation
Inventor： Peter Bacon
IPC: H03H11/24
Abstract: A programmable voltage variable attenuator (VVA) that enables selection among multiple analog, continuous attenuation ranges. Some embodiments include a dual-mode interface to enable digitally programming a DAC and provide the analog output to control the attenuation level of the VVA, or alternatively apply an externally provided analog voltage to directly control the VVA attenuation level. A VVA may be used in conjunction with a digital step attenuator (DSA). Some embodiments include circuitry for changing the VVA reference impedance. The attenuator architecture of the VVA includes one or more variable resistance shunt elements and/or series elements which may be a resistor and FET circuit controlled by a provided variable analog voltage. The multiple resistance element architecture may be implemented with stacked FET devices. Embodiments for the VVA may be based, for example, on T-type, Bridged-T type, Pi-type, L-pad type, reflection type, or balanced coupler type attenuators.
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公开(公告)号：US20190097625A1
公开(公告)日：2019-03-28
申请号：US16168681
申请日：2018-10-23
Applicant: pSemi Corporation
Inventor： Jianhua Lu , Peter Bacon , Raul Inocencio Alidio , Vikram Sekar
IPC: H03K17/687 , H04B1/00 , H03K17/693 , H03K17/10 , H04B1/44
Abstract: An RF switching device having distributed shunt switches distributed along transmission lines to improve RF bandwidth as well as the signal isolation of the device. The shunt switches may be physically positioned on both sides of the transmission lines to keep an integrated circuit (IC) design essentially symmetrical so as to provide predictable and reliable operational characteristics. Some embodiments include stacked FET shunt switches and series switches to tolerate high voltages. In some embodiments, the gate resistor for each FET shunt switch is divided into two or more portions.
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公开(公告)号：US10184973B2
公开(公告)日：2019-01-22
申请号：US15829761
申请日：2017-12-01
Applicant: pSemi Corporation
Inventor： Dan William Nobbe , Ronald Eugene Reedy , Peter Bacon , James S. Cable
IPC: G01R31/28 , H03F1/56 , H03F3/195 , H03F3/213 , H03F3/24 , H03F1/02 , H03F1/22 , H03F3/193 , H03F3/21 , H03F3/72 , H03H7/38 , H04B1/44 , H04B1/48 , H04B17/11
Abstract: An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.
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公开(公告)号：US10148265B2
公开(公告)日：2018-12-04
申请号：US15660675
申请日：2017-07-26
Applicant: pSemi Corporation
Inventor： Jianhua Lu , Peter Bacon , Raul Inocencio Alidio , Vikram Sekar
IPC: H03K17/687 , H04B1/00 , H03K17/693 , H03K17/10 , H04B1/44
Abstract: An RF switching device having distributed shunt switches distributed along transmission lines to improve RF bandwidth as well as the signal isolation of the device. The shunt switches may be physically positioned on both sides of the transmission lines to keep an integrated circuit (IC) design essentially symmetrical so as to provide predictable and reliable operational characteristics. Some embodiments include stacked FET shunt switches and series switches to tolerate high voltages. In some embodiments, the gate resistor for each FET shunt switch is divided into two or more portions.
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Patent Agency Ranking
26.发明授权公开(公告)号：US12231094B2
公开(公告)日：2025-02-18
申请号：US17539990
申请日：2021-12-01
Applicant: pSemi Corporation
Inventor： Tero Ranta , Marc Facchini , Peter Bacon , Allen Groenke
Abstract: Methods and systems for determining the error vector magnitudes for an RF device by fitting voltage magnitudes to a Rayleigh distribution to produce weighting parameters for an EVM calculation, either in simulation for designing the RF device or as validation measurements from a physical RF device.
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公开(公告)号：US20240275416A1
公开(公告)日：2024-08-15
申请号：US18585690
申请日：2024-02-23
Applicant: pSemi Corporation
Inventor： Rong Jiang , Khushali Shah , Peter Bacon
CPC classification number: H04B1/18 , G05F1/59 , H03F3/189 , H03G1/0088 , H03G3/3042 , H03H7/24 , H03H7/38 , H03K5/08 , H03F2200/294
Abstract: A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
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公开(公告)号：US20240213678A1
公开(公告)日：2024-06-27
申请号：US18088444
申请日：2022-12-23
Applicant: pSemi Corporation
Inventor： Peter Bacon , Sinan Goktepeli , Kouassi Sebastien Kouassi
CPC classification number: H01Q9/0407 , H01Q1/2283 , H01Q21/065
Abstract: Antenna structures that can be located in close proximity with respect to an associated RFFE IC regardless of antenna element size. An antenna structure, including a grid or planar antenna or an array of antenna elements, is co-fabricated as part of or with one or more associated RFFE ICs using 3-D stacking of IC dies, either directly or as part of an embedded die packaging technology. Some embodiments include a combinable co-fabricated antenna element, including at least one internally co-fabricated RF antenna element configured to be electrically connectable to a corresponding RF antenna element in a second combinable co-fabricated antenna element by means of 3-D integrated circuit stacking. Some embodiments include a plurality of combinable co-fabricated antenna elements coupled together by means of 3-D integrated circuit stacking such that the antenna elements form a grid antenna or comprise an array of antenna patches.
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公开(公告)号：US20230238995A1
公开(公告)日：2023-07-27
申请号：US18159296
申请日：2023-01-25
Applicant: pSemi Corporation
Inventor： Rong Jiang , Khushali Shah , Peter Bacon
CPC classification number: H04B1/18 , H03F3/189 , H03K5/08 , G05F1/59 , H03H7/24 , H03G3/3042 , H03H7/38 , H03G1/0088 , H03F2200/294
Abstract: A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
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公开(公告)号：US11329615B2
公开(公告)日：2022-05-10
申请号：US16886243
申请日：2020-05-28
Applicant: pSemi Corporation
Inventor： Vikas Sharma , Peter Bacon
Abstract: Methods and apparatuses for providing a reduction in output power of a balanced amplifier configuration are presented. According to one aspect, reduction of the output power is provided by deactivating one of the two amplification paths of the balanced amplifier. According to another aspect, impedances seen at ports of input and output couplers of the balanced amplifier configuration part of a deactivated amplification path are selectively switched in dependence of operation according to the reduced output power or according to normal output power. In addition, or in the alternative, impedance seen at an isolated/terminated port of the input and/or the output coupler is selectively switched in dependence of the operation. When operating according to the reduced output power, values of the switched impedances can be adjusted to tune a frequency response of the balanced amplifier.
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