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公开(公告)号:US11588513B2
公开(公告)日:2023-02-21
申请号:US17375861
申请日:2021-07-14
Applicant: pSemi Corporation
Inventor: Mark L. Burgener , James S. Cable
IPC: H04B1/48 , H03G11/00 , H01B1/04 , H04B1/00 , H03F1/02 , H01L27/02 , H03F3/21 , H03F1/56 , H01Q23/00 , H03G3/30 , H04B1/04 , H03F1/22 , H03F3/189 , H03F3/217 , H03F3/68 , H04L27/04 , H03F3/19
Abstract: A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.
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公开(公告)号:US11070244B2
公开(公告)日:2021-07-20
申请号:US16891519
申请日:2020-06-03
Applicant: pSemi Corporation
Inventor: Mark L. Burgener , James S. Cable
IPC: H04B1/48 , H03G11/00 , H01B1/04 , H04B1/00 , H03F1/02 , H01L27/02 , H03F3/21 , H03F1/56 , H01Q23/00 , H03G3/30 , H04B1/04 , H04L27/04 , H03F3/19
Abstract: A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.
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公开(公告)号:US10715200B2
公开(公告)日:2020-07-14
申请号:US16515967
申请日:2019-07-18
Applicant: pSemi Corporation
Inventor: Mark L. Burgener , James S. Cable
IPC: H04B1/00 , H03F1/56 , H04B1/48 , H01Q23/00 , H03G3/30 , H03G11/00 , H04B1/04 , H04L27/04 , H03F1/02 , H01L27/02 , H03F3/19 , H03F3/21
Abstract: A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.
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公开(公告)号:US20190081655A1
公开(公告)日:2019-03-14
申请号:US15917218
申请日:2018-03-09
Applicant: pSemi Corporation
Inventor: Mark L. Burgener , James S. Cable
IPC: H04B1/48 , H03F1/02 , H03F1/56 , H04B1/00 , H04B1/04 , H03F3/21 , H03F3/19 , H01L27/02 , H04L27/04 , H01Q23/00 , H03G3/30 , H03G11/00
CPC classification number: H04B1/48 , H01L27/0248 , H01Q23/00 , H03F1/0205 , H03F1/56 , H03F1/565 , H03F3/19 , H03F3/21 , H03F2200/387 , H03F2200/451 , H03G3/3042 , H03G11/00 , H04B1/0053 , H04B1/0475 , H04L27/04
Abstract: A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.
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公开(公告)号:US10148255B2
公开(公告)日:2018-12-04
申请号:US14883525
申请日:2015-10-14
Applicant: pSemi Corporation
Inventor: Mark L. Burgener , Dylan J. Kelly , James S. Cable
Abstract: A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.
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公开(公告)号:US11206017B2
公开(公告)日:2021-12-21
申请号:US16930215
申请日:2020-07-15
Applicant: pSemi Corporation
Inventor: Mark L. Burgener , James S. Cable , Robert H. Benton
IPC: H03K17/687 , H01P1/15 , H03K17/06 , H03K17/10 , H03K19/0185 , H03K19/0944 , H04B1/40 , H03K17/693 , H03K17/08
Abstract: A novel RF switch circuit and method for switching RF signals is described. The RF switch circuit is fabricated in a silicon-on-insulator (SOI) technology. The RF switch includes pairs of switching and shunting transistor groupings used to alternatively couple RF input signals to a common RF node. The switching and shunting transistor grouping pairs are controlled by a switching control voltage (SW) and its inverse (SW_). The switching and shunting transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. The stacking of transistor grouping devices, and associated gate resistors, increase the breakdown voltage across the series connected switch transistors and operate to improve RF switch compression. A fully integrated RF switch is described including digital control logic and a negative voltage generator integrated together with the RF switch elements. In one embodiment, the fully integrated RF switch includes a built-in oscillator, a charge pump circuit, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. Several embodiments of the charge pump, level shifting, voltage divider, and RF buffer circuits are described. The inventive RF switch provides improvements in insertion loss, switch isolation, and switch compression.
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公开(公告)号:US20200076427A1
公开(公告)日:2020-03-05
申请号:US16676350
申请日:2019-11-06
Applicant: pSemi Corporation
Inventor: Mark L. Burgener , James S. Cable , Robert H. Benton
IPC: H03K17/687 , H01P1/15 , H03K17/06 , H03K17/10 , H03K17/693 , H03K19/0185 , H03K19/0944 , H04B1/40
Abstract: A novel RF switch circuit and method for switching RF signals is described. The RF switch circuit is fabricated in a silicon-on-insulator (SOI) technology. The RF switch includes pairs of switching and shunting transistor groupings used to alternatively couple RF input signals to a common RF node. The switching and shunting transistor grouping pairs are controlled by a switching control voltage (SW) and its inverse (SW). The switching and shunting transistor groupings comprise one or more MOSFET transistors connected together in a “stacked” or serial configuration. The stacking of transistor grouping devices, and associated gate resistors, increase the breakdown voltage across the series connected switch transistors and operate to improve RF switch compression. A fully integrated RF switch is described including digital control logic and a negative voltage generator integrated together with the RF switch elements. In one embodiment, the fully integrated RF switch includes a built-in oscillator, a charge pump circuit, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. Several embodiments of the charge pump, level shifting, voltage divider, and RF buffer circuits are described. The inventive RF switch provides improvements in insertion loss, switch isolation, and switch compression.
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8.
公开(公告)号:US20190115367A1
公开(公告)日:2019-04-18
申请号:US15948939
申请日:2018-04-09
Applicant: pSemi Corporation
Inventor: James S. Cable , Anthony Mark Miscione , Ronald Eugene Reedy
Abstract: Novel integrated circuits (SOI ICs), and methods for making and mounting the ICs are disclosed. In one embodiment, an IC comprises a first circuit layer of the IC formed from an active layer of an SOI wafer. The first circuit layer is coupled to a first surface of buffer layer, and a second surface of the buffer layer is coupled to a selected substrate comprising an insulating material. The selected substrate may be selected, without limitation, from the following types: sapphire, quartz, silicon dioxide glass, piezoelectric materials, and ceramics. A second circuit layer of the IC are formed, coupled to a second surface of the selected substrate. In one embodiment of a mounted IC, the first circuit layer is coupled to contact pads on a package substrate via solder bumps or copper pillars. The second circuit layer is coupled to contact pads on the package substrate via wire bonds.
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公开(公告)号:US20190097612A1
公开(公告)日:2019-03-28
申请号:US16169831
申请日:2018-10-24
Applicant: pSemi Corporation
Inventor: Mark L. Burgener , Dylan J. Kelly , James S. Cable
Abstract: A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.
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公开(公告)号:US20230142184A1
公开(公告)日:2023-05-11
申请号:US17964530
申请日:2022-10-12
Applicant: pSemi Corporation
Inventor: Mark L. Burgener , James S. Cable
IPC: H03H9/00 , H01Q1/50 , H03H7/38 , H03H7/48 , H03H9/54 , H03H9/64 , H03H9/70 , H03H9/72 , H03H7/40
CPC classification number: H03H9/0009 , H01Q1/50 , H03H7/38 , H03H7/40 , H03H7/48 , H03H9/0014 , H03H9/542 , H03H9/547 , H03H9/706 , H03H9/725 , H03H9/6403 , H03H9/6483 , H03H9/6489 , H03H2009/02204
Abstract: Embodiments of resonator circuits and modulating resonators and are described generally herein. One or more acoustic wave resonators may be coupled in series or parallel to generate tunable filters. One or more acoustic wave resonances may be modulated by one or more capacitors or tunable capacitors. One or more acoustic wave modules may also be switchable in a filter. Other embodiments may be described and claimed.
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