公开(公告)号：US20080213981A1

公开(公告)日：2008-09-04

申请号：US11815176

申请日：2005-01-31

Applicant: Philippe Renaud ,  Isabelle Bertrand

Inventor： Philippe Renaud ,  Isabelle Bertrand

IPC: H01L21/20

CPC classification number: B81C1/00611 ,  B81C2201/0119 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02494 ,  H01L21/02532 ,  H01L21/02658 ,  H01L21/02667

Abstract: In the field of sensor fabrication, it is known to form a silicon-on-insulator starting structure from which fabrication of the sensor based. The present invention provides a method of forming a silicon-on-insulator structure comprising a substrate having an insulating layer patterned thereon. A silicon oxide layer is then deposited over the patterned insulating layer before silicon is grown over both an exposed surface of the substrate as well as the silicon oxide layer, mono-crystalline silicon forming on the exposed parts of the substrate and polysilicon forming on the silicon oxide layer. After depositing a capping layer over the structure, the wafer is heated, whereby the polysilicon re-crystallises to form mono-crystalline silicon, resulting in the insulating layer being buried beneath mono-crystalline silicon.

Abstract translation: 在传感器制造领域中，已知形成绝缘体上硅启动结构，从而制造基于传感器的开关结构。 本发明提供一种形成绝缘体上硅结构的方法，该方法包括在其上构图绝缘层的衬底。 然后在硅在衬底的暴露表面上生长硅以及氧化硅层，在衬底的暴露部分上形成的单晶硅和在硅上形成的多晶硅之后，在图案化的绝缘层上沉积氧化硅层 氧化层。 在结构上沉积覆盖层之后，加热晶片，由此多晶硅再结晶以形成单晶硅，导致绝缘层被埋在单晶硅之下。

公开(公告)号：US20050085000A1

公开(公告)日：2005-04-21

申请号：US10961162

申请日：2004-10-12

Applicant: Koichi Ikeda ,  Takashi Kinoshita

Inventor： Koichi Ikeda ,  Takashi Kinoshita

IPC: B81C1/00 ,  B81B3/00 ,  H01L21/00

CPC classification number: B81C1/00611 ,  B81B2201/042 ,  B81B2203/0118 ,  B81C2201/0109 ,  B81C2201/0119 ,  B81C2201/0125

Abstract: The present invention is directed to manufacturing methods of electrostatic type MEMS devices. The manufacturing method of the present invention includes the steps of forming a substrate side electrode on a substrate, forming a fluid film before or after forming a sacrificial layer, further forming a beam having a driving side electrode on a planarized surface of the fluid film, and finally, removing the sacrificial layer. Furthermore, performing the foregoing method planarizes the surface of a driving side electrode, reduces fluctuations in the shape of a beam, and improves the performance and the uniformity of the MEMS device.

公开(公告)号：US20040077119A1

公开(公告)日：2004-04-22

申请号：US10468757

申请日：2003-08-25

Inventor： Koichi Ikeda ,  Takashi Kinoshita

IPC: H01L021/00

CPC classification number: B81C1/00611 ,  B81B2201/042 ,  B81B2203/0118 ,  B81C2201/0109 ,  B81C2201/0119 ,  B81C2201/0125

Abstract: The present invention provides manufacturing methods of electrostatic type MEME devices, in which planarizing the surface of a driving side electrode, reducing fluctuations in the shape of a beam, improving the performance and the uniformity are aimed at. A manufacturing method according to the present invention includes the steps of: forming a substrate side electrode on a substrate, forming a fluid film before or after forming a sacrificial layer, further forming a beam having a driving side electrode on a planarized surface of the fluid film, and finally, removing the sacrificial layer.

Abstract translation: 本发明提供了静电型MEME器件的制造方法，其中平面化驱动侧电极的表面，减小了光束形状的波动，提高了性能和均匀性。 根据本发明的制造方法包括以下步骤：在基板上形成基板侧电极，在形成牺牲层之前或之后形成流体膜，在流体的平坦化表面上进一步形成具有驱动侧电极的光束 电影，最后，去除牺牲层。

公开(公告)号：US20030129542A1

公开(公告)日：2003-07-10

申请号：US10282542

申请日：2002-10-28

Applicant: BREWER SCIENCE, INC.

Inventor： Wu-Sheng Shih ,  James E. Lamb III ,  Mark Daffron

IPC: H01L021/31 ,  H01L021/469 ,  G03F007/00

CPC classification number: B81C1/0046 ,  B81C1/00611 ,  B81C2201/0119 ,  C08G59/68 ,  C08L63/00 ,  H01L21/02118 ,  H01L21/02282 ,  H01L21/02348 ,  H01L21/31051 ,  H01L21/312

Abstract: The present invention is directed towards planarization materials that produce little or no volatile byproducts during the hardening process when used in contact planarization processes. The materials can be hardened by photo-irradiation or by heat during the planarization process, and they include one or more types of monomers, oligomers, or mixtures thereof, an optional cross-linker, and an optional organic reactive solvents. The solvent, if used, is chemically reacted with the monomers or oligomers and thus becomes part of the polymer matrix during the curing process. These materials can be used for damascene, dual damascene, bi-layer, and multi-layer applications, microelectromechanical system (MEMS), packaging, optical devices, photonics, optoelectronics, microelectronics, and sensor devices fabrication.

Abstract translation: 本发明涉及在用于接触平面化处理时在硬化过程期间产生很少或不产生挥发性副产物的平面化材料。 这些材料可以在平坦化过程中通过光照射或加热来硬化，并且它们包括一种或多种类型的单体，低聚物或其混合物，任选的交联剂和任选的有机反应性溶剂。 溶剂（如果使用的话）与单体或低聚物发生化学反应，因此在固化过程中成为聚合物基质的一部分。 这些材料可用于镶嵌，双镶嵌，双层和多层应用，微机电系统（MEMS），封装，光学器件，光子学，光电子学，微电子学和传感器器件制造。

公开(公告)号：US06520197B2

公开(公告)日：2003-02-18

申请号：US09867942

申请日：2001-05-30

Applicant: Ajay Deshmukh ,  Dorian Liepmann

Inventor： Ajay Deshmukh ,  Dorian Liepmann

IPC: F15C104

CPC classification number: B01F13/0072 ,  B01F5/0403 ,  B01F13/0093 ,  B01F15/0201 ,  B01F15/024 ,  B01F15/0243 ,  B01F2005/0031 ,  B81C1/00611 ,  B81C2201/0119 ,  Y10T137/0329 ,  Y10T137/2185 ,  Y10T137/2196 ,  Y10T137/2224

Abstract: A micro-electromechanical system and method for continuous laminar fluid mixing. An embodiment of the invention described in the specification includes a mixing channel, a first delivery channel that is connected to the mixing channel, and a second delivery channel that is connected to the mixing channel. A first pump mechanism produces pulses in the first delivery channel. A second pump mechanism produces pulses in the second delivery channel. The first pulsed fluid stream and the second pulsed fluid stream merge in the mixing channel to form a mixed fluid. The pulses in the fluids operate to distort the interface between the fluids to facilitate diffusion between the fluids.

Abstract translation: 一种用于连续层流混合的微机电系统和方法。 在说明书中描述的本发明的实施例包括混合通道，连接到混合通道的第一输送通道和连接到混合通道的第二输送通道。 第一泵机构在第一输送通道中产生脉冲。 第二泵机构在第二输送通道中产生脉冲。 第一脉冲流体流和第二脉冲流体流在混合通道中合并形成混合流体。 流体中的脉冲操作以扭曲流体之间的界面，以促进流体之间的扩散。

公开(公告)号：US20020164876A1

公开(公告)日：2002-11-07

申请号：US10054697

申请日：2002-01-18

Inventor： Hans S. Walitzki ,  Howard W. Hogle ,  Wing S. Luk ,  Claudian R. Nicolesco

IPC: H01L021/302 ,  H01L021/461

CPC classification number: H01L21/31053 ,  B24B37/044 ,  B81C1/00611 ,  B81C2201/0119 ,  C09G1/02 ,  H01L21/2007

Abstract: According to the invention, a method for preparing multicrystalline substrates as nullhandle wafersnull for subsequent bonding to nulldevice layernull quality materials is disclosed. In one step, starting with a suitable substrate such as multicrystalline silicon, the substrate surface is prepared for layer transfers by using a novel CMP method in which, after a suitable period of polishing at elevated pH, a surfactant and rinse material is gradually introduced into the slurry to lower pH and remove wear materials from the slurry. In another step, a filler layer of polycrystalline silicon is transferred to the face of the polished substrate to a predetermined thickness, thus filling in surface defects remaining after the initial CMP step, and a subsequent CMP polishing step is performed. By these steps, multicrystalline substrates can be prepared with surface roughness of twenty Angstroms or less, which is suitable for defect-free bonding to device-layer materials in this embodiment.

Abstract translation: 根据本发明，公开了一种用于制备多晶基板作为用于后续结合到“器件层”质量材料的“处理晶片”的方法。 在一个步骤中，从诸如多晶硅的合适的衬底开始，通过使用新的CMP方法制备用于层转移的衬底表面，其中在升高的pH下在适当的抛光周期后，将表面活性剂和漂洗材料逐渐引入 该浆料降低pH并从浆料中除去磨损材料。 在另一步骤中，将多晶硅的填料层转移到抛光的衬底的表面至预定厚度，从而填充在初始CMP步骤之后残留的表面缺陷，并进行随后的CMP研磨步骤。 通过这些步骤，可以制备具有20埃或更小的表面粗糙度的多晶衬底，其适合于在该实施例中与器件层材料的无缺陷结合。