公开(公告)号：US4323791A

公开(公告)日：1982-04-06

申请号：US144855

申请日：1980-04-29

Applicant: Jean L. Berger ,  Jean L. Coutures

Inventor： Jean L. Berger ,  Jean L. Coutures

IPC: G06G7/14 ,  G11C19/28 ,  H01L29/768 ,  H03H15/02 ,  H01L29/78

CPC classification number: H03H15/02 ,  G06G7/14 ,  G11C19/285 ,  H01L29/76866

Abstract: The storage electrodes are electrically connected at a point. A reference charge quantity is stored beneath the first storage electrode when the point is at a constant potential and before charges pass beneath the second storage electrode. When a charge quantity arrives beneath the second storage electrode and when the point is floating, the surface potential beneath the first storage electrode is maintained constant and a charge quantity is transferred from the first storage electrode to a third storage electrode.

Abstract translation: 存储电极在某一点电连接。 当点处于恒定电位并且电荷在第二存储电极之下通过时，参考电荷量被存储在第一存储电极下方。 当电荷量到达第二存储电极的下方，并且当点浮动时，第一存储电极下面的表面电位保持恒定，并且电荷量从第一存储电极转移到第三存储电极。

公开(公告)号：US4316258A

公开(公告)日：1982-02-16

申请号：US93817

申请日：1979-11-13

Applicant: Jean L. Berger

Inventor： Jean L. Berger

IPC: H03H15/02 ,  G06G7/16 ,  H03K5/159

CPC classification number: H03H15/02

Abstract: The filter has p stages, p being the number of bits on which are expressed the digital filtering coefficients. Each of the stages has a charge transfer shift register, called the signal register, receiving the analog signal E(t) to be filtered and a charge transfer shift register, called the coefficient register, receiving the M bits of the same weight of the M filtering coefficients. The filter also has an operator which multiplies the signal E(t) by each of the M filtering coefficients and then summates these various products to supply the output signal S(t) of the filter.

Abstract translation: 滤波器具有p级，p是在其上表示数字滤波系数的位数。 每个级具有电荷转移移位寄存器，称为信号寄存器，接收要滤波的模拟信号E（t）和称为系数寄存器的电荷转移移位寄存器，接收M的相同权重的M位 滤波系数。 滤波器还具有将信号E（t）乘以M个滤波系数中的每一个的运算符，然后将这些各种乘积相加以提供滤波器的输出信号S（t）。

公开(公告)号：US4314162A

公开(公告)日：1982-02-02

申请号：US109336

申请日：1980-01-03

Applicant: Takao Tsuchiya ,  Mitsuo Soneda

Inventor： Takao Tsuchiya ,  Mitsuo Soneda

IPC: G11C27/04 ,  G11C19/28 ,  G11C27/00 ,  H01L21/339 ,  H01L29/76 ,  H01L29/762 ,  H01L29/772 ,  H03H7/30 ,  H03H15/02 ,  H03K5/00 ,  H03K17/60

CPC classification number: H03H15/02 ,  G11C19/28 ,  G11C27/00 ,  H01L29/76

Abstract: A filter circuit of the type utilizing a charge-transfer device, such as a bucket brigade device, comprises a clocking signal drive circuit for supplying a clocking signal; a clock signal generator at whose output a clocking control signal is provided; a transistor whose base is connected to the output of the clock signal generator; a plurality of successive capacitive storage stages for sequentially holding a charge level representing a time-sampled input signal, each of the capacitive storage stages having a clocking electrode for receiving the clocking signal so that the charge level is transferred from one to another of the capacitive storage stages in succession, and at least one of the capacitive storage stages being formed of first and second parallel-connected capacitive circuit portions, and the first and second capacitive circuit portions having respective clocking electrodes coupled to the clock signal generator and to the emitter of the transistor, respectively; and a current feedback circuit, such as a current mirror circuit, for detecting the current flowing through the collector of the transistor and applying a corresponding current to a capacitive storage stage in advance of that stage which is coupled to the emitter of the transistor.

Abstract translation: 利用诸如铲斗旅装置的电荷转移装置的类型的滤波器电路包括用于提供时钟信号的时钟信号驱动电路; 时钟信号发生器，其输出提供时钟控制信号; 其基极连接到时钟信号发生器的输出的晶体管; 多个连续的电容性存储级，用于顺序地保持表示时间采样的输入信号的电荷电平，每个电容性存储级具有用于接收时钟信号的时钟电极，使得充电电平从电容 存储级，并且电容性存储级中的至少一个由第一和第二并联电容电路部分形成，并且第一和第二电容电路部分具有耦合到时钟信号发生器和与时钟信号发生器的发射极 晶体管; 以及电流反馈电路，例如电流镜电路，用于检测流过晶体管的集电极的电流，并在耦合到晶体管的发射极的该级之前将电流施加到电容性存储级。

公开(公告)号：US4293832A

公开(公告)日：1981-10-06

申请号：US136375

申请日：1980-04-01

Applicant: Jean L. Berger

Inventor： Jean L. Berger

IPC: H01L21/339 ,  H01L29/76 ,  H01L29/762 ,  H03H15/02 ,  G11C19/28 ,  H03H17/02

CPC classification number: H01L29/76 ,  H03H15/02

Abstract: One storage electrode of the filter out of two is cut into two parts. The weighting coefficients are elaborated by reading means connected to a part of each cut storage electrode which read negatively the charges leaving a so-called negative cut storage electrode and positively the charges arriving under the next so-called positive cut storage electrode.

Abstract translation: 将两个过滤器的一个存储电极切成两部分。 加权系数由连接到每个切割的存储电极的一部分的读取装置进行阐述，该部分对带有所谓的负切割存储电极的电荷进行负调节，并且肯定地读出在下一个所谓的正切割存储电极下方的电荷。

公开(公告)号：US4283696A

公开(公告)日：1981-08-11

申请号：US69790

申请日：1979-08-27

Applicant: Karl Goser

Inventor： Karl Goser

IPC: G11C19/28 ,  G11C27/00 ,  G11C27/04 ,  H03H15/02 ,  H03H17/04

CPC classification number: H03H15/02 ,  G11C19/282 ,  G11C27/00 ,  G11C27/04

Abstract: The invention relates to a method for operating recursive filter circuits or analog storage circuits constructed according to the charge coupled device principle and to a circuit arrangement for implementing the method, in which method only each respective second stage a CCD is occupied with a charge representing a sampling value of an analog signal and the respective stages lying between these stages concerned are left empty. Known circuits constructed according to the CCD principle conduct the signal from the output stage of a CCD chain to the input of the CCD loop via an amplifier to which the input signal is supplied at the same time. Thereby, the amplification must very precisely amount to 1. An amplifier of the high stability required for that purpose which is arranged in common with the CCD concerned on a chip cannot be satisfactorily realized. A method is specified by means of the invention in which the amplifier is replaced by modulation of a sampling value with a reference signal and by means of a charge amount corrected in accord with the result of the modulation.

Abstract translation: 本发明涉及一种用于操作根据电荷耦合器件原理构造的递归滤波器电路或模拟存储电路的方法，以及用于实现该方法的电路装置，其中仅每个相应的第二级CCD被占用一个代表 模拟信号的采样值以及位于这些相关阶段之间的各个阶段是空的。 根据CCD原理构造的已知电路通过同时提供输入信号的放大器将信号从CCD链的输出级传送到CCD环路的输入。 因此，放大必须非常精确地等于1.与芯片相关的CCD共同设置的该目的所需的高稳定性的放大器不能令人满意地实现。 通过本发明规定了一种方法，其中放大器被具有参考信号的采样值的调制代替，并且借助于根据调制结果校正的电荷量来代替。

公开(公告)号：US4268806A

公开(公告)日：1981-05-19

申请号：US871613

申请日：1978-01-23

Applicant: Hermann Betzl ,  Friedrich Kuenemund

Inventor： Hermann Betzl ,  Friedrich Kuenemund

IPC: H03H15/02 ,  H03H17/00 ,  G11C19/28 ,  H03H11/00

CPC classification number: H03H15/02

Abstract: A filter comprising a cascade arrangement of closed line CTD filtering loops has an intermediate CTD coupling loop formed with the adjoining output coupling of the preceding filter loop and input coupling of the succeeding filter loop. Disturbing self-oscillations outside the desired passband are eliminated by adjusting the voltage amplification factors of the amplifiers within the intermediate coupling loop, for example to from about five percent to about fifteen percent less than values selected to give a pure reactance branching circuit at the middle pass frequency. The resulting slight distortion of the transmission characteristic in the pass band of the filter can then be compensated by adjusting the amplifications of other amplifiers, and if necessary the capacitance conditions can be additionally altered.

Abstract translation: 包括封闭线CTD滤波回路的级联布置的滤波器具有中间CTD耦合回路，该中间CTD耦合回路与前述滤波器回路的相邻输出耦合和后续滤波器回路的输入耦合形成。 通过调节中间耦合回路内的放大器的电压放大因子，例如，比选择的中间耦合回路中的放大器的电压放大系数减去大约百分之五至百分之十五，以在中间产生纯电抗分支电路来消除所需通带之外的干扰自振荡。 通过频率。 然后可以通过调节其他放大器的放大率来补偿滤波器的通带中的传输特性的轻微失真，并且如果需要，可以额外改变电容条件。

公开(公告)号：US4262217A

公开(公告)日：1981-04-14

申请号：US122724

申请日：1980-02-19

Applicant: Peter A. Levine

Inventor： Peter A. Levine

IPC: H03H15/00 ,  G11C19/28 ,  G11C27/00 ,  G11C27/04 ,  H01L21/339 ,  H01L29/417 ,  H01L29/762 ,  H01L29/768 ,  H03H15/02 ,  H04N9/78 ,  H01L29/78

CPC classification number: H03H15/02 ,  G11C19/285 ,  G11C27/00 ,  H01L29/76808 ,  H04N9/78

Abstract: The present circuit is applicable to buried channel charge coupled devices (CCD's) of the type having an input circuit which employs a "skimming" technique for producing a charge representing an input signal. A given amount of charge initially is present in an input potential well of the CCD and an amount of charge representing an input signal is skimmed therefrom for propagation down the CCD, leaving behind a residual charge which continuously remains in the input potential well. The gain of the input circuit of the CCD is controlled by controlling the amount of this residual charge either in open loop fashion or by means of feedback. A comb filter suitable for separating the luminance and chrominance components of a television signal which includes this circuit is also described.

Abstract translation: 本电路适用于具有输入电路的类型的掩埋沟道电荷耦合器件（CCD），该输入电路采用“撇取”技术来产生表示输入信号的电荷。 给定的电荷量最初存在于CCD的输入势阱中，并且从其中撇除代表输入信号的电荷量以便向下传播CCD，留下连续保留在输入势阱中的残余电荷。 通过以开环方式或通过反馈控制该剩余电荷的量来控制CCD的输入电路的增益。 还描述了适用于分离包括该电路的电视信号的亮度和色度分量的梳状滤波器。

公开(公告)号：US4245199A

公开(公告)日：1981-01-13

申请号：US904790

申请日：1978-05-11

Applicant: Paul I. Suciu

Inventor： Paul I. Suciu

IPC: H01L29/768 ,  H03H15/02 ,  G11C19/28 ,  H03K5/135

CPC classification number: H01L29/76875 ,  H01L29/768 ,  H03H15/02

Abstract: A filter in the form of a semiconductor charge coupled device (CCD) split electrode transveral filter section (10) of many transfer stages, typically of the order of 150, is characterized by a controllable detection threshold level by means of the addition of an auxiliary CCD split-electrode section (20) of but a few stages, typically one or two. Each segment of a split-electrode 209 of this auxiliary section (20) is connected to the corresponding sense line of the transveral filter section (10).

Abstract translation: 许多传输级的半导体电荷耦合器件（CCD）分离电极跨滤波器部分（10）形式的滤波器通常为150级，其特征在于通过添加辅助器件的可控检测阈值电平 CCD分离电极部分（20），但是几个阶段，通常是一个或两个。 该辅助部分（20）的分割电极209的每个部分连接到过渡部分（10）的相应感测线。

公开(公告)号：US4243958A

公开(公告)日：1981-01-06

申请号：US33361

申请日：1979-04-26

Applicant: Doran K. Wilde

Inventor： Doran K. Wilde

IPC: H03H15/02 ,  G11C19/28 ,  G11C27/00

CPC classification number: H03H15/02

Abstract: A phase multiplexed CCD transversal filter includes N substantially identical parallel-connected CCD's which acquire samples in a predetermined consecutive order over a given clock cycle so that the apparent sampling frequency is equal to N times the clock frequency. The output taps of the CCD's are weighted in a predetermined manner to provide a filter having a predetermined transfer function.

Abstract translation: 相位多路复用CCD横向滤波器包括N个基本上相同的并联CCD，其在给定的时钟周期内以预定的连续顺序获取采样，使得表观采样频率等于时钟频率的N倍。 以预定的方式对CCD的输出抽头进行加权，以提供具有预定传递函数的滤波器。

公开(公告)号：US4163957A

公开(公告)日：1979-08-07

申请号：US832232

申请日：1977-09-12

Applicant: Karl Knauer ,  Max Schlichte ,  Hans-Joerg Pfleiderer

Inventor： Karl Knauer ,  Max Schlichte ,  Hans-Joerg Pfleiderer

IPC: H01L29/768 ,  H03H15/02 ,  H03H7/28 ,  G11C19/28 ,  H01L29/76 ,  H03K5/156

CPC classification number: H03H15/02 ,  H01L29/76891 ,  H03H15/023

Abstract: In illustrated embodiments, at least one analogue shift register has a number of parallel inputs and one series output. A number of individual evaluating circuits receive the signal to be filtered and supply respective output quantities of charge equal to the product of the difference between the relevant signal value and a predetermined minimum or maximum value, and a respective individual evaluation factor. The output of each evaluating circuit can be connected via a switching element to an associated parallel input. The capacity of every storage position of the shift register is at least such that it is always able to accommodate the maximum quantity of charge supplied by the preceding storage position, and when the storage position has a parallel input, can additionally accommodate the maximum quantities of charge supplied by the associated evaluating circuit (s). Various modifications are disclosed for reducing the space requirement of a transversal filter when implemented, for example, as a CCD.

Abstract translation: 在所示实施例中，至少一个模拟移位寄存器具有多个并行输入和一个串联输出。 多个单独的评估电路接收要滤波的信号，并提供相应的输出电荷量等于相关信号值与预定最小值或最大值之差的乘积，以及各自的评估因子。 每个评估电路的输出可以经由开关元件连接到相关联的并行输入。 移位寄存器的每个存储位置的容量至少使得其总是能够适应由先前存储位置提供的最大量的电荷，并且当存储位置具有并行输入时，可另外容纳最大量的 由相关联的评估电路提供的电荷。 公开了用于在实现例如CCD时减小横向滤波器的空间需求的各种修改。