Abstract:
A system for interpolating half-pels from a pixel array stores pixel data for each pixel in one of a plurality of different memory areas based on a location of the pixel within the pixel array, and determines a specific address in each one of the plurality of memory areas based on a target pixel in the pixel array. The system determines each specific address based on a location of the target pixel in the pixel array. The system also reads, from each the plurality of memory areas, pixel data from determined specific addresses and determines a value of at least one half-pel for the target pixel based on the read pixel data.
Abstract:
A format for the recording of trick play signals is proposed in which trick play segments comprising sync blocks of information of a trick play signal are recorded in groups of p successive tracks. At least first and second trick play signals are recorded on the record carrier. The first trick play signal is meant for reproduction in a reproduction apparatus at a reproduction speed n1 times the recording speed with which the trick play signals are recorded on the record carrier. The second trick play signal is meant for reproduction in the said reproduction apparatus at a reproduction speed nulln1 times the recording speed. The first trick play signal is recorded using a first head having a first azimuth angle and the second trick play signal is recorded using a second write head having a second azimuth angle different from the first azimuth angle.
Abstract:
In the method of manufacturing a circular optical storage disc (10), an extension body (21) is present around the substrate (11) of the optical disc (10) during the spin coating of cover or spacer layers (15). The extension body (21) may consist of one or several pieces. The outer periphery (23) has a circular or polygonal shape. The inner periphery of the extension body is in close circumferential contact with the periphery (13) of the optical disc substrate (11). The surface (22) of the extension body is substantially flush with the surface (12) of the substrate (11) of the optical disc in order not to impede the flow of spin coating liquid during spin coating. The raised edge (16), which usually forms at the periphery (13) of the substrate (11) is now transferred to the outer periphery (23) of the extension body (21). After the coating operation the extension body (21) is removed. By choosing a surface (22) to which the coating (15) adheres poorly, reuse of the extension body (21) is facilitated. The manufactured optical storage disc (10) has no or a very small raised edge (16), and the method causes no extra birefringence.
Abstract:
Method of recording a series of ordered real-time information signals, such as audio/video information, on a disc like recording medium, such as an optically readable disc. The method comprises recording of contiguous sequences of detectable marks, each sequence representing a successive series of information signals of an A/V program, in a distributed manner across the recordable area of the disc like recording medium. Between the recorded sequences, preferably free space remains available for recording contiguous sequences of information signals of another A/V program in a same distributed manner. In an embodiment, a logical address space is divided in successive allocation areas, each allocation area used for subsequently recording a specific sequence of an A/V program.
Abstract:
TV receiver apparatus (1) and a related method are disclosed, the TV receiver apparatus comprising a video signal receiver (2) for receiving video signals transmitted from an external video signal transmitter, a GPS signal receiver (3) for receiving GPS signals transmitted from an external GPS signal transmitter and signal coupling means (4) connected to both receivers. The signal coupling means is adapted to provide both receivers with respective video and GPS signals via a common antenna (5) where the antenna is adapted to receive terrestrially broadcasted video signals.
Abstract:
Integrated circuit with a test interface for testing a conductive connection between a supply pad and a supply of a functional block in the integrated circuit. A current test circuit has test inputs coupled to a first and a second point along the conductive connection, for comparing a voltage across the test inputs with a threshold. The current test circuit contains a threshold shifting circuit for shifting the threshold to a shifted value dependent on a voltage across the test inputs when the threshold shifting circuit is active. Testing is executed in two steps, making the threshold shifting circuit active when a first voltage is applied across test inputs and comparing a second voltage at the test input with the shifted threshold. One of the first and second voltage is a voltage drop across the connection when the integrated circuit is set to draw current along said connection, the other one of the first and second voltage is a reference voltage. In an embodiment the integrated circuit has a shunt circuit to provoke current through the conductive connection under test in parallel with current through the functional block.
Abstract:
A semiconductor device comprises a semiconductor body (10) in and on which a power transistor (T; 1, 2, 3) and a suppression diode (D; 100) are integrated. A diode junction (40; 40null) is present between the back metallisation (22) and the adjacent region (2) of the power transistor so as to provide the diode in series with this region (2) and adjacent to the back surface (12) of the body. This diode junction (40; 40null) opposes the p-n junction (42) between the collector or drain region (2) of the transistor and its base region (3), so as to suppress reverse current flow in the transistor. The higher doped part (2b) of the adjacent transistor region (2) is sufficiently thick as to prevent any minority charge carriers injected by the diode junction (40; 40null) from reaching the p-n junction (42) with the base region (3). The diode junction may be a p-n junction (40) or a Schottky barrier (40null). This transistor-diode configuration also permits an anti-parallel diode (D3) to be mounted side-by-side with the power transistor in the same device package (50-53).
Abstract:
A method of manufacturing a thin film transistor (TFT) is disclosed comprising source and drain electrodes joined by a semiconductor channel layer, a gate insulating layer formed from at least two sublayers and a gate electrode. The method comprising the steps of forming the gate insulating layer by depositing a thin film sublayer using a thin film technique; and depositing a printed sublayer by printing, wherein the thin film sublayer is located adjacent the semiconductor channel layer. The TFT may be a top gate TFT wherein the thin film sublayer is formed on the semiconductor channel layer, and wherein the printed sublayer is formed over the thin film sublayer. Alternatively, the TFT may be a bottom gate TFT wherein the printed sublayer is formed over the gate electrode; wherein the thin film sublayer is formed over the printed sublayer, and wherein the semiconductor channel layer is formed on the thin film sublayer.
Abstract:
In a reflective liquid crystal display device comprising on a substrate (12) an array of reflective pixel electrodes (45) which are each connected to the output of a respective switching device (18), e.g. a TFT, carried on the substrate and which are provided on an insulating layer (40) that extends over the switching device, each pixel electrode (45) is connected to the output (31) of its associated switching device through a plurality of tapered contact openings (47) in the insulating layer (40) which form depressions (50) in the pixel electrode surface for enhancing the pixel's light reflection characteristics. The number, shape, size and relative disposition of such openings can be varied to tailor these characteristics. Preferably, a conductive layer (35) extends from the switching device output (31) beneath the area of the pixel electrode (45) for contacting the electrode at each opening and may have a rough surface resulting in asperities at the pixel electrode surface which further enhance its reflection properties.
Abstract:
A method and device for the manufacture of a hollow cone (37) with a cone tip (31) whereby a parison of viscous material (35) is molded into the shape of the hollow cone. An escape space (11) becomes accessible to the material in the vicinity of a cone tip to be formed. The moment the pressure present in the material in the vicinity of the cone tip to be formed exceeds a previously defined value. Breaking-off of the cone tip during or after molding is prevented by this. The hollow cone is suitable inter alia for use in a cathode ray tube.