公开(公告)号：US20050093135A1

公开(公告)日：2005-05-05

申请号：US10697099

申请日：2003-10-31

Applicant: Wei-Chi Liu ,  Wei-Feng Lin ,  Chung-Ju Wu

Inventor： Wei-Chi Liu ,  Wei-Feng Lin ,  Chung-Ju Wu

IPC: H01L23/433 ,  H01L23/10 ,  H01L23/34

CPC classification number: H01L23/4334 ,  H01L2224/32245 ,  H01L2924/16152 ,  H01L2924/1815

Abstract: The present invention relates to a thermal dissipating element of a chip to dissipate heat producing by operating the chip. The thermal dissipating element includes a top plate and a side plate, wherein the top plate curves and extends to be the side plate. The top plate includes a sink contacting with the chip.

Abstract translation: 本发明涉及一种芯片的散热元件，用于散发通过操作芯片产生的热量。 散热元件包括顶板和侧板，其中顶板弯曲并延伸成侧板。 顶板包括与芯片接触的接收器。

公开(公告)号：US06838756B2

公开(公告)日：2005-01-04

申请号：US10227266

申请日：2002-08-26

Applicant: Wei-Feng Lin ,  Chung-Ju Wu ,  Chen-Wen Tsai

Inventor： Wei-Feng Lin ,  Chung-Ju Wu ,  Chen-Wen Tsai

IPC: H01L23/13 ,  H01L23/495

CPC classification number: H01L23/13 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A chip-packaging substrate. The substrate is capable of reducing damage during packaging, shrinking its connecting portions so that the length of any of the gap slots between the packaging portion and the frame portion of the substrate is increased. Furthermore, a dummy layer is provided to one surface of the frame portion to flush the surface on the frame portion with that of the packaging portion as much as possible.

Abstract translation: 芯片封装基板。 该基板能够减少封装期间的损坏，使其连接部分收缩，使得封装部分和基板的框架部分之间的任何间隙的长度增加。 此外，在框架部分的一个表面上设置虚拟层，以尽可能多地将框架部分的表面与包装部分的表面齐平。

公开(公告)号：US06753595B1

公开(公告)日：2004-06-22

申请号：US10341363

申请日：2003-01-14

Applicant: Wei Feng Lin ,  Chung Ju Wu ,  Wen-Yu Lo ,  Wen-Dong Yen

Inventor： Wei Feng Lin ,  Chung Ju Wu ,  Wen-Yu Lo ,  Wen-Dong Yen

IPC: H05K706

CPC classification number: H05K9/0067 ,  H01L23/49816 ,  H01L23/49838 ,  H01L23/60 ,  H01L24/48 ,  H01L2224/05599 ,  H01L2224/16 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A substrate used in a semiconductor device. The substrate includes a first wiring layer, a second wiring layer, and an interconnection-wiring layer. The first wiring layer includes a plurality of first pads while the second wiring layer includes a plurality of second pads. The interconnection-wiring layer is set between the first and second wiring layer. In this case, at least one of the second pads isn't electrically connected with anyone of the first pads, and other second pads that located adjacent to this second pad, which is not electrically connected with the first pads, electrically connect to the interconnection-wiring layer. Furthermore, this invention also discloses a semiconductor device including the substrate.

Abstract translation: 用于半导体器件的衬底。 基板包括第一布线层，第二布线层和布线层。 第一布线层包括多个第一焊盘，而第二布线层包括多个第二焊盘。 互连布线层设置在第一和第二布线层之间。 在这种情况下，至少一个第二焊盘不与第一焊盘中的任一个电连接，并且与第二焊盘相邻的其它第二焊盘与第一焊盘没有电连接，电连接到互连 接线层。 此外，本发明还公开了一种包括该基板的半导体器件。

公开(公告)号：US06747350B1

公开(公告)日：2004-06-08

申请号：US10455525

申请日：2003-06-06

Applicant: Wei-Feng Lin ,  Yin-Chieh Hsueh ,  Chung-Ju Wu

Inventor： Wei-Feng Lin ,  Yin-Chieh Hsueh ,  Chung-Ju Wu

IPC: H01L2312

CPC classification number: H01L23/3128 ,  H01L21/563 ,  H01L23/49822 ,  H01L23/552 ,  H01L24/32 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/166 ,  H01L2924/19041 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00

Abstract: A flip chip package structure. The structure includes a substrate, an IC chip electrically connected to the substrate through a plurality of conductive bumps, encapsulant between the substrate and IC chip, and an electrically protective device. The substrate has interior wiring, a plurality of first contacts arranged at a predetermined pitch among each other on a surface, and a trace line area beyond the first contacts on the surface. The electrically protective device has a protruding part covering the IC chip, and an extending part extending over the surface of the substrate with a gap as large as 40 mil. The extending part further covers the trace line area, and connects to the surface of the substrate using a fixing material.

Abstract translation: 倒装芯片封装结构。 该结构包括基板，通过多个导电凸块电连接到基板的IC芯片，基板和IC芯片之间的密封剂以及电保护装置。 衬底具有内部布线，在表面上彼此以预定间距布置的多个第一触点以及超过表面上的第一触点的迹线区域。 电保护装置具有覆盖IC芯片的突出部分和在基板的表面上延伸大约40密耳的间隙的延伸部分。 延伸部分进一步覆盖迹线区域，并使用固定材料连接到基板的表面。