公开(公告)号：US10605999B2

公开(公告)日：2020-03-31

申请号：US16579671

申请日：2019-09-23

Applicant: INPHI CORPORATION

Inventor： Radhakrishnan L. Nagarajan ,  Peng-Chih Li ,  Masaki Kato

IPC: G02B6/42 ,  H04B10/40 ,  H04B10/516

Abstract: A photonic transceiver apparatus in QSFP package. The apparatus includes a case having a base member, two partial side members, and a lid member to provide a spatial volume with an opening at a back end of the base member. Additionally, the apparatus includes a PCB, installed inside the spatial volume over the base member having a pluggable electrical connector at the back end. Further, the apparatus includes multiple optical transmitting devices in mini-transmit-optical-sub-assembly package, each being mounted on a common support structure and having a laser output port in reversed orientation toward the back end. Furthermore, the apparatus includes a silicon photonics chip, including a fiber-to-silicon attachment module, mounted on the PCB and coupled to a modulation driver module and a trans-impedance amplifier module. Moreover, the apparatus includes a pair of optical input/output ports being back connected to the fiber-to-silicon attachment module.

公开(公告)号：US10605991B2

公开(公告)日：2020-03-31

申请号：US16352636

申请日：2019-03-13

Applicant: INPHI CORPORATION

Inventor： Samira Karimelahi ,  Masaki Kato

IPC: G02B6/293 ,  H04B10/25 ,  G02B6/28 ,  H04L25/03

Abstract: The present disclosure provides an optical equalizer for photonics system in an electric-optical communication network. The optical equalizer includes an input port and an output port. Additionally, the optical equalizer includes a filter having a number of stages coupled to each other in a multi-stage series with an output terminal of any stage being coupled to an input terminal of an adjacent next stage while the input terminal of a first stage of the multi-stage series being coupled from the input port. Each stage includes a tap terminal configured to pass an optical power factored by a coefficient of multiplication from the corresponding input terminal of the stage to a tap-output path characterized by a corresponding phase delay. Furthermore, the optical equalizer includes a combiner configured to sum up the optical powers respectively from the number of tap-output paths of the multi-stage series to the output port.

公开(公告)号：US10572425B2

公开(公告)日：2020-02-25

申请号：US16267748

申请日：2019-02-05

Applicant: INPHI CORPORATION

Inventor： Sreenivas Krishnan ,  Nirmal Raj Saxena

IPC: G06F13/40 ,  H04L12/64 ,  H04L12/66 ,  H04Q11/00 ,  G06F13/42 ,  H04B10/27 ,  H04J14/02 ,  H04L12/933

Abstract: A method of operating a computer network system configured with disaggregated inputs/outputs. This system can be configured in a leaf-spine architecture and include a router coupled to a network source, a plurality of core switches coupled to the router, a plurality of aggregator switches coupled to each of the plurality of core switches, and a plurality of rack modules coupled to each of the plurality of aggregator switches. Each of rack modules can include an I/O appliance with a downstream aggregator module, a plurality of server devices each with PCIe interfaces, and an upstream aggregator module that aggregates each of the PCIe interfaces. A high-speed link can be configured between the downstream and upstream aggregator modules via aggregation of many serial lanes to provide reliable high speed bit stream transport over long distances, which allows for better utilization of resources and scalability of memory capacity independent of the server count.

公开(公告)号：US20200059348A1

公开(公告)日：2020-02-20

申请号：US16664666

申请日：2019-10-25

Applicant: INPHI CORPORATION

Inventor： Simon FOREY ,  Parmanand MISHRA ,  Michael S. HARWOOD ,  Rajasekhar NAGULAPALLI

IPC: H04L7/00 ,  H03L7/093 ,  H04L7/033 ,  H03L7/08 ,  H02M3/07

Abstract: The present invention is directed to electrical circuits. More specifically, embodiments of the present invention provide a charge pump, which can be utilized as a part of a clock data recovery device. Early and late signals are used as differential switching voltage signals in the charge pump. The first switch and a second switch are used for controlling the direction of the current flowing into the loop filter. Input differential voltages to the switches are being generated with an opamp negative feedback loop. The output voltage of the first switch and the second switch is used in conjunction with a resistor to generate a charge pump current. There are other embodiments as well.

公开(公告)号：US10466431B2

公开(公告)日：2019-11-05

申请号：US16352054

申请日：2019-03-13

Applicant: INPHI CORPORATION

Inventor： Radhakrishnan L. Nagarajan ,  Peng-Chih Li ,  Masaki Kato

IPC: G02B6/42 ,  H04B10/40 ,  H04B10/516

Abstract: A photonic transceiver apparatus in QSFP package. The apparatus includes a case having a base member, two partial side members, and a lid member to provide a spatial volume with an opening at a back end of the base member. Additionally, the apparatus includes a PCB, installed inside the spatial volume over the base member having a pluggable electrical connector at the back end. Further, the apparatus includes multiple optical transmitting devices in mini-transmit-optical-sub-assembly package, each being mounted on a common support structure and having a laser output port in reversed orientation toward the back end. Furthermore, the apparatus includes a silicon photonics chip, including a fiber-to-silicon attachment module, mounted on the PCB and coupled to a modulation driver module and a trans-impedance amplifier module. Moreover, the apparatus includes a pair of optical input/output ports being back connected to the fiber-to-silicon attachment module.

公开(公告)号：US20190319741A1

公开(公告)日：2019-10-17

申请号：US16451986

申请日：2019-06-25

Applicant: INPHI CORPORATION

Inventor： Benjamin P. SMITH ,  Arash FARHOODFAR

IPC: H04L1/00 ,  H04B10/516 ,  H04B10/532 ,  H03M13/29 ,  H04B10/54 ,  H04B10/50 ,  H04B10/69

Abstract: An optical module processes first FEC (Forward Error Correction) encoded data produced by a first FEC encoder. The optical module has a second FEC encoder for further coding a subset of the first FEC encoded data to produce second FEC encoded data. The optical module also has an optical modulator for modulating, based on a combination of the second FEC encoded data and a remaining portion of the first FEC encoded data that is not further coded, an optical signal for transmission over an optical channel. The second FEC encoder is an encoder for an FEC code that has a bit-level trellis representation with a number of states in any section of the bit-level trellis representation being less than or equal to 64 states. In this manner, the second FEC encoder has relatively low complexity (e.g. relatively low transistor count) that can reduce power consumption for the optical module.

公开(公告)号：US20190310418A1

公开(公告)日：2019-10-10

申请号：US16440814

申请日：2019-06-13

Applicant: Inphi Corporation

Inventor： Samira KARIMELAHI ,  Masaki KATO

IPC: G02B6/124 ,  G02B6/27 ,  G01M11/00 ,  G02B6/30 ,  G02B6/125 ,  G02B6/122 ,  G02B6/126

Abstract: A surface grating coupler for polarization splitting or diverse includes a planar layer and an array of scattering elements arranged in the planar layer at intersections of a first set of concentric elliptical curves crossing with a second set of concentric elliptical curves rotated proximately 90 or 180 degrees to form a two-dimensional (2D) grating. Additionally, the grating coupler includes a first waveguide in double-taper shape and a second waveguide in double-taper shape respectively for split or diverse an incident light into the 2D grating into two output light to two output ports with a same (either TE or TM) polarization mode or one output port with TE polarization mode and another output port with TM polarization mode. The polarization diverse grating coupler is required to test multiple polarization sensitive photonics components and can be used with other single polarization grating coupler via a fiber array to perform wafer-level testing.

公开(公告)号：US20190268091A1

公开(公告)日：2019-08-29

申请号：US16403408

申请日：2019-05-03

Applicant: INPHI CORPORATION

Inventor： Jamal RIANI ,  Benjamin P. SMITH ,  Volodymyr SHVYDUN ,  Sudeep BHOJA ,  Arash FARHOODFAR

IPC: H04L1/00 ,  H03M13/29 ,  H04B14/02

Abstract: The present invention is directed to data communication systems and techniques thereof. More specifically, embodiments of the present invention provide an FEC encoder that generates parity symbols that are embedded into FEC blocks. An FEC decoder determines whether to perform error correction based on the parity symbols. When performing error correction, the decoder selects a worst symbol from a segment of symbols, and the worst symbol is corrected. There are other embodiments as well.

公开(公告)号：US20190268075A1

公开(公告)日：2019-08-29

申请号：US16408256

申请日：2019-05-09

Applicant: INPHI CORPORATION

Inventor： Todd ROPE ,  Sung CHOI ,  James STEWART ,  Radhakrishnan L. NAGARAJAN ,  Paul YU ,  Ilya LYUBOMIRSKY

IPC: H04B10/61 ,  H04B17/20 ,  G02B6/293 ,  G02B6/12 ,  H04L27/18 ,  H04B10/69 ,  H04B10/67

Abstract: The present invention is directed to a communication signal tracking system comprising an optical receiver including one or more delay line interferometers (DLIs) configured to demultiplex incoming optical signals and a transimpedance amplifier configured to convert the incoming optical signals to incoming electrical signals. The communication signal tracking system further includes a control module configured to calculate a bit-error-rate (BER) of the incoming electrical signals before forward-error correction decoding, and use the BER as a parameter for optimizing settings of the one or more DLIs in one or more iterations in a control loop and generating a back-channel data.

公开(公告)号：US10396896B2

公开(公告)日：2019-08-27

申请号：US16163331

申请日：2018-10-17

Applicant: INPHI CORPORATION

Inventor： Jamal Riani ,  Sudeep Bhoja

IPC: H04B10/27 ,  H04L27/34 ,  H03K9/02 ,  H04B10/61 ,  H04B14/00 ,  H04L27/06 ,  H04B10/25 ,  H04L27/02

Abstract: The present invention is directed to data communication system and methods. More specifically, various embodiments of the present invention provide a communication interface that is configured to transfer data at high bandwidth using nDSQ format(s) over optical communication networks. In certain embodiments, the communication interface is used by various devices, such as spine switches and leaf switches, within a spine-leaf network architecture, which allows large amount of data to be shared among servers.