公开(公告)号：US20060203579A1

公开(公告)日：2006-09-14

申请号：US11306381

申请日：2005-12-27

Applicant: Jun-Lin Yeh

Inventor： Jun-Lin Yeh

IPC: G11C29/00 ,  G11C7/00

CPC classification number: G11C29/883 ,  G11C29/88

Abstract: A device for compensating a semiconductor memory defect, suitable for use in a semiconductor memory, is provided. The device includes a memory array, having at least a defectless sub-memory region, the memory array being coupled to an address decoder circuit and a sensing circuit for storing data. A selection circuit is coupled to a control unit and outputs a selection signal to the control unit. A first input address buffer is coupled to the control unit and the address decoder circuit, and outputs an address signal to the address decoder circuit in response to the selection signal for selecting the defectless sub-memory region to store data. A method for compensating a semiconductor memory defect is also provided, including determining whether the memory region of the semiconductor memory has a defect; and replacing the memory region with the defectless sub-memory region to store data when the semiconductor memory is defective.

Abstract translation: 提供一种适用于半导体存储器的用于补偿半导体存储器缺陷的装置。 该装置包括具有至少一个无缺陷的子存储器区域的存储器阵列，该存储器阵列耦合到地址解码器电路和用于存储数据的感测电路。 选择电路耦合到控制单元并将选择信号输出到控制单元。 第一输入地址缓冲器耦合到控制单元和地址解码器电路，并且响应于用于选择无缺陷子存储器区域以存储数据的选择信号而将地址信号输出到地址解码器电路。 还提供了一种用于补偿半导体存储器缺陷的方法，包括确定半导体存储器的存储区是否具有缺陷; 以及当半导体存储器有缺陷时用无缺陷子存储器区域替换存储区域以存储数据。

公开(公告)号：US07035111B1

公开(公告)日：2006-04-25

申请号：US10444330

申请日：2003-05-23

Applicant: Jun Lin ,  Tom D. Wright

Inventor： Jun Lin ,  Tom D. Wright

IPC: H05K1/00 ,  H05K1/18 ,  H05K7/02 ,  H05K7/06

CPC classification number: G06F1/184 ,  G06F1/18 ,  H05K7/1487

Abstract: A circuit board contained in a circuit board holder forms a server blade that fits into a bay of a server blade enclosure. The circuit board permits standard electrical components to fit within the cross-sectional width of the server blade. The server blade in cross section may be generally triangular, L-shaped or another type of polygon that permits placement of tall components that otherwise would not fit in a generally rectangular server blade.

Abstract translation: 包含在电路板保持器中的电路板形成适合于服务器刀片外壳的托架的服务器刀片。 电路板允许标准电气部件装配在服务器刀片的横截面宽度内。 横截面的服务器刀片可以是大致三角形的，L形的或另一种类型的多边形，其允许放置另外不适合于大致矩形的服务器刀片的高部件。

公开(公告)号：US20050199750A1

公开(公告)日：2005-09-15

申请号：US10800186

申请日：2004-03-10

Applicant: Jun-Lin Wang

Inventor： Jun-Lin Wang

IPC: A62C13/62 ,  A62C13/66 ,  B05B9/03 ,  B05B9/047 ,  F23D11/24

CPC classification number: B05B7/0433 ,  A62C13/003 ,  B05B7/0012 ,  B05B7/0483 ,  B05B7/0853 ,  B05B7/0869 ,  B05B7/0892

Abstract: A mist sprayer includes a base, a pump, a pressure storage member, a circuit board, a mounting tube, an injection unit, a decorative shade, a mounting seat, a guide unit, a bottle, and a plug. Thus, the liquid is mixed with and atomized by the pressurized gas and the misted gas hits the striking face of the guide unit to multiple misted molecules, thereby enhancing and optimizing the atomized effect of the liquid.

Abstract translation: 喷雾器包括底座，泵，压力存储构件，电路板，安装管，注射单元，装饰性遮光罩，安装座，引导单元，瓶和塞子。 因此，液体与加压气体混合并雾化，雾化气体将引导单元的击打面撞击到多个雾化分子，从而增强和优化液体的雾化效果。

公开(公告)号：US06624025B2

公开(公告)日：2003-09-23

申请号：US09940158

申请日：2001-08-27

Applicant: Chia-Ta Hsieh ,  Di Son Kuo ,  Chrong-Jun Lin ,  Wen-Ting Chu

Inventor： Chia-Ta Hsieh ,  Di Son Kuo ,  Chrong-Jun Lin ,  Wen-Ting Chu

IPC: H01L21336

CPC classification number: H01L27/11521 ,  H01L27/115

Abstract: A split-gate flash memory cell having improved programming and erasing speed with a tilted trench source, and also a method of forming the same are provided. This is accomplished by forming two floating gates and their respective control gates sharing a common source region. A trench is formed in the source region and the walls are sloped to have a tilt. A source implant is performed at a tilt angle and the trench is lined with a gate oxide layer. Subsequently, a lateral diffusion of the source implant is performed followed by thermal cycling. The lateral enlargement of the diffused source is found to increase the coupling ratio of the split-gate flash memory cell substantially.

Abstract translation: 提供了具有倾斜沟槽源的改进的编程和擦除速度的分裂栅极闪存单元，以及其形成方法。 这通过形成两个浮动栅极和它们各自的控制栅极共享公共源极区域来实现。 在源区域中形成沟槽，并且壁倾斜以具有倾斜。 以倾斜角进行源植入，并且沟槽衬有栅极氧化物层。 随后，进行源植入物的横向扩散，然后进行热循环。 发现扩散源的横向放大基本上增加了分裂栅极闪存单元的耦合比。

公开(公告)号：US06379807B1

公开(公告)日：2002-04-30

申请号：US09707573

申请日：2000-11-07

Applicant: John D Nordstrom ,  Jun Lin

Inventor： John D Nordstrom ,  Jun Lin

IPC: B32B904

CPC classification number: C08G18/6295 ,  C08G18/4063 ,  C09D175/04 ,  Y10T428/31551 ,  Y10T428/31663 ,  C08L2666/16

Abstract: The present invention is directed to a coating composition particularly useful as a clear coating applied over a pigmented base coating, wherein the clear coating has improved resistance to marring and to acid etching when exposed to natural weathering conditions. The clear coating is particularly useful as an automotive OEM clear coating or as a refinish clear coating. The coating has two components. Component A of the coating composition includes a melamine and an acrylosilane polymer of a polymerized monomers mixture, which includes an alkyl methacrylate, an alkyl acrylate, cycloaliphatic alkyl methacrylate, cycloaliphatic alkyl acrylate, styrene or any mixture of these monomers; hydroxy alkyl methacrylate, hydroxy alkyl acrylate or any mixtures of these monomers; and a mono-ethylenically unsaturated silane monomer. Component B of the composition includes an organic polyisocyanate as a crosslinking agent.

Abstract translation: 本发明涉及一种涂料组合物，其特别可用作涂覆在着色基底涂料上的透明涂层，其中透明涂层在暴露于自然风化条件下时具有改善的耐磨性和酸蚀刻性。 透明涂层特别适用于汽车OEM透明涂层或透明涂层。 涂层有两个部件。 涂料组合物的组分A包括聚合单体混合物的三聚氰胺和丙烯硅烷聚合物，其包括甲基丙烯酸烷基酯，丙烯酸烷基酯，甲基丙烯酸环脂基烷基酯，丙烯酸环脂族烷基酯，苯乙烯或这些单体的任何混合物; 羟基烷基甲基丙烯酸酯，丙烯酸羟基烷基酯或这些单体的任何混合物; 和单烯属不饱和硅烷单体。 组合物的组分B包含作为交联剂的有机多异氰酸酯。

公开(公告)号：US6165861A

公开(公告)日：2000-12-26

申请号：US152348

申请日：1998-09-14

Applicant: Ruey-Hsin Liu ,  Jun-Lin Tsai ,  Yung-Lung Hsu

Inventor： Ruey-Hsin Liu ,  Jun-Lin Tsai ,  Yung-Lung Hsu

IPC: H01L21/02 ,  H01L27/08 ,  H01L21/20

CPC classification number: H01L28/20 ,  H01L27/0802

Abstract: A stable, high-value polysilicon resistor is achieved by using a silicide layer that prevents diffusion of hydrogen into the resistor. The resistor can also be integrated into a salicide process for making FETs without increasing process complexity. A polysilicon layer with a cap oxide is patterned to form FET gate electrodes and the polysilicon resistor. The lightly doped source/drains, insulating sidewall spacers, and source/drain contacts are formed for the FETs. The cap oxide is patterned to expose one end of the resistor, and the cap oxide is removed from the gate electrodes. A refractory metal is deposited and annealed to form the salicide FETs and concurrently to form a silicide on the end of the resistor. The unreacted metal is etched. An interlevel dielectric layer is deposited and contact holes with metal plugs are formed to both ends of the resistor. A metal is deposited to form the first level of metal interconnections, which also provides contacts to both ends of the resistor. The metal is also patterned to form a metal shield over the resistor to prevent hydrogen diffusion into the resistor. In this invention the spacing between the metal portions contacting the ends of the resistor is aligned over the silicide on the resistor to provide 100% shielding from hydrogen diffusion into the resistor.

Abstract translation: 通过使用防止氢进入电阻器的硅化物层来实现稳定的高价值多晶硅电阻器。 电阻器也可以集成到自对准硅化物工艺中，用于制造FET而不增加工艺复杂性。 图案化具有帽氧化物的多晶硅层以形成FET栅电极和多晶硅电阻器。 形成了用于FET的轻掺杂源极/漏极，绝缘侧壁间隔物和源极/漏极接触。 盖帽氧化物被图案化以暴露电阻器的一端，并且帽状氧化物从栅电极移除。 沉积和退火难熔金属以形成硅化物FET并同时在电阻器的末端形成硅化物。 未反应的金属被蚀刻。 沉积层间电介质层，并且在电阻器的两端形成与金属插塞的接触孔。 沉积金属以形成第一级金属互连，其也提供与电阻器两端的接触。 金属也被图案化以在电阻器上形成金属屏蔽，以防止氢扩散到电阻器中。 在本发明中，接触电阻器端部的金属部分之间的间隔在电阻器上的硅化物上排列，以提供100％的阻挡氢扩散到电阻器中的屏蔽。

公开(公告)号：US11947390B2

公开(公告)日：2024-04-02

申请号：US17682030

申请日：2022-02-28

Applicant: John Bernard Ardisana, II ,  Emily Lauren Clopp ,  Teodor Dabov ,  Mathias Hintermann ,  Jinwoo Kim ,  Jun Lin ,  Ashutosh Y. Shukla

Inventor： John Bernard Ardisana, II ,  Emily Lauren Clopp ,  Teodor Dabov ,  Mathias Hintermann ,  Jinwoo Kim ,  Jun Lin ,  Ashutosh Y. Shukla

IPC: H02J7/00 ,  A45C11/04 ,  A45C15/00 ,  G06F1/16 ,  H01R13/62 ,  H01R33/05 ,  H01R33/94

CPC classification number: G06F1/1632 ,  A45C11/04 ,  A45C15/00 ,  H01R13/6205 ,  H01R33/05 ,  H01R33/94 ,  H02J7/0045 ,  G06F1/163

Abstract: A case for an eyewear device includes a body defining an opening leading to a storage chamber that is sized for retaining the eyewear device. A cover depends from the body and is movable between an open position, in which the opening is exposed, and a closed position, in which the opening is covered by the cover. A battery is mounted to the body for charging the eyewear device. A detector is positioned on either the body or the cover for detecting when the cover is in the open position or the closed position. A display displays a charge state of the battery when the cover is in the open position.

公开(公告)号：US10971281B2

公开(公告)日：2021-04-06

申请号：US16200941

申请日：2018-11-27

Applicant: Yi-jun Lin ,  Bor Z. Jang

Inventor： Yi-jun Lin ,  Bor Z. Jang

IPC: H01B1/18 ,  C08K3/04 ,  C08K9/04 ,  H01B13/00 ,  C08J3/20

Abstract: A polymer matrix composite containing graphene sheets homogeneously dispersed in a polymer matrix wherein the polymer matrix composite exhibits a percolation threshold from 0.0001% to 0.1% by volume of graphene sheets to form a 3D network of interconnected graphene sheets or network of electron-conducting pathways.

公开(公告)号：US20170021387A1

公开(公告)日：2017-01-26

申请号：US14756006

申请日：2015-07-20

Applicant: Yi-jun Lin ,  Shaio-yen Lee ,  Aruna Zhamu ,  Bor Z. Jang

Inventor： Yi-jun Lin ,  Shaio-yen Lee ,  Aruna Zhamu ,  Bor Z. Jang

IPC: B05D1/28 ,  B05D3/00 ,  B05D3/12 ,  C01B31/04 ,  B05D1/40

CPC classification number: B05D1/28 ,  B05D1/40 ,  B05D3/007 ,  B05D3/12 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/184 ,  C01B32/20 ,  C01B32/23

Abstract: A process for producing a highly oriented graphene oxide (GO) film, comprising: (a) preparing either a GO dispersion having GO sheets dispersed in a fluid medium or a GO gel having GO molecules dissolved in a fluid medium; (b) dispensing the GO dispersion or gel onto a surface of an application roller rotating in a first direction to form an applicator layer of GO and transferring the applicator layer to a surface of a supporting film driven in a second direction opposite to the first direction to form a wet layer of GO on the supporting film; and (c) removing said fluid medium from the wet layer of GO to form a dried layer of GO having an inter-planar spacing d002 of 0.4 nm to 1.2 nm and an oxygen content no less than 5% by weight. This dried GO layer may be heat-treated to produce a graphitic film.

Abstract translation: 一种制备高取向氧化石墨（GO）膜的方法，包括：（a）制备具有分散在流体介质中的GO片的GO分散体或具有溶解在流体介质中的GO分子的GO凝胶; （b）将GO分散体或凝胶分配到沿第一方向旋转的施加辊的表面上，以形成GO的施用层，并将施加器层转移到沿与第一方向相反的第二方向驱动的支撑膜的表面 在支撑膜上形成GO的湿层; 和（c）从GO的湿层去除所述流体介质以形成具有0.4nm至1.2nm的平坦间距d002和氧含量不小于5％重量的GO的干燥层。 该干燥的GO层可以被热处理以产生石墨膜。

公开(公告)号：US09530531B2

公开(公告)日：2016-12-27

申请号：US13815317

申请日：2013-02-21

Applicant: Yi-jun Lin ,  Aruna Zhamu ,  Bor Z. Jang

Inventor： Yi-jun Lin ,  Aruna Zhamu ,  Bor Z. Jang

IPC: B05D5/12 ,  H01B1/02 ,  H01B1/08 ,  H01B1/04 ,  B05D1/12 ,  C23C4/12 ,  C23C4/04 ,  B05D1/24 ,  H05K3/12

CPC classification number: H01B1/02 ,  B05D1/005 ,  B05D1/02 ,  B05D1/04 ,  B05D1/12 ,  B05D1/18 ,  B05D1/24 ,  B05D5/12 ,  C23C4/04 ,  C23C4/12 ,  H01B1/04 ,  H01B1/08 ,  H05K3/12

Abstract: A process for producing a transparent conductive film, comprising (a) providing a graphene oxide gel; (b) dispersing metal nanowires in the graphene oxide gel to form a suspension; (c) dispensing and depositing the suspension onto a substrate; and (d) removing the liquid medium to form the film. The film is composed of metal nanowires and graphene oxide with a metal nanowire-to-graphene oxide weight ratio from 1/99 to 99/1, wherein the metal nanowires contain no surface-borne metal oxide or metal compound and the film exhibits an optical transparence no less than 80% and sheet resistance no higher than 300 ohm/square. This film can be used as a transparent conductive electrode in an electro-optic device, such as a photovoltaic or solar cell, light-emitting diode, photo-detector, touch screen, electro-wetting display, liquid crystal display, plasma display, LED display, a TV screen, a computer screen, or a mobile phone screen.

Abstract translation: 一种制造透明导电膜的方法，包括（a）提供石墨烯氧化物凝胶; （b）将金属纳米线分散在氧化石墨烯凝胶中以形成悬浮液; （c）将悬浮液分配并沉积到基底上; 和（d）除去液体介质以形成膜。 该膜由金属纳米线和氧化石墨烯组成，金属纳米线对石墨烯氧化物的重量比为1/99至99/1，其中金属纳米线不含表面金属氧化物或金属化合物，并且该膜表现出光学 透明度不低于80％，薄片电阻不高于300欧姆/平方。 该膜可以用作电光装置中的透明导电电极，例如光伏或太阳能电池，发光二极管，光电检测器，触摸屏，电润湿显示器，液晶显示器，等离子体显示器，LED 显示，电视屏幕，电脑屏幕或手机屏幕。