公开(公告)号：US08306652B2

公开(公告)日：2012-11-06

申请号：US12048624

申请日：2008-03-14

Applicant: Justin Potok Bandholz ,  Clifton Ehrich Kerr ,  Pravin Patel ,  Bruce James Wilkie

Inventor： Justin Potok Bandholz ,  Clifton Ehrich Kerr ,  Pravin Patel ,  Bruce James Wilkie

IPC: G06F15/173 ,  G06F15/16

CPC classification number: G06F13/4072 ,  H04L12/40032 ,  H05K7/1492

Abstract: In one embodiment, a communication system for a multi-blade server system includes a multi-drop serial bus network interconnecting a management module with each of a plurality of servers in a multi-server chassis. A first transceiver subsystem is configured for communicating over the serial bus network between the management module and each server within a first frequency band. A second transceiver subsystem is configured for simultaneously communicating over the serial bus network between the management module and the servers within a second frequency band higher than the first frequency band. A first signal-filtering subsystem substantially filters out signals in the second frequency band from the first transceiver subsystem. A second signal-filtering subsystem substantially filters out the signals in the first frequency band from the second transceiver subsystem.

Abstract translation: 在一个实施例中，用于多刀片服务器系统的通信系统包括将管理模块与多服务器机箱中的多个服务器中的每一个互连的多点串行总线网络。 第一收发器子系统被配置用于通过串行总线网络在管理模块和第一频带内的每个服务器之间进行通信。 第二收发器子系统被配置为在高于第一频带的第二频带内在管理模块和服务器之间通过串行总线网络同时通信。 第一信号滤波子系统基本上从第一收发器子系统滤出第二频带中的信号。 第二信号滤波子系统基本上从第二收发器子系统滤除第一频带中的信号。

公开(公告)号：US20120216083A1

公开(公告)日：2012-08-23

申请号：US13458319

申请日：2012-04-27

Applicant: David Windell ,  Pravin Patel ,  James Hughes ,  Christopher West ,  Robert Piper ,  Timothy Schlude

Inventor： David Windell ,  Pravin Patel ,  James Hughes ,  Christopher West ,  Robert Piper ,  Timothy Schlude

IPC: G06F11/07

CPC classification number: G06F11/325 ,  H04L41/0645

Abstract: Methods and systems for implementing such methods for providing server fault notifications, diagnostic and system management information may include, but are not limited to: receiving a network fault status request input; illuminating one or more server node fault indicators for one or more degraded server nodes having one or more faults; receiving a server node fault status request input for a degraded server node having one or more faults; and displaying one or more diagnostic service notifications for one or more faults of the degraded server node.The displaying of the diagnostic service notifications may allow for the completion of various service operations associated with the service notifications once the information specific to a fault is presented.

Abstract translation: 用于实现用于提供服务器故障通知，诊断和系统管理信息的这种方法的方法和系统可以包括但不限于：接收网络故障状态请求输入; 为具有一个或多个故障的一个或多个退化服务器节点照亮一个或多个服务器节点故障指示符; 接收具有一个或多个故障的劣化服务器节点的服务器节点故障状态请求输入; 以及显示针对所述退化服务器节点的一个或多个故障的一个或多个诊断服务通知。 一旦出现故障特有的信息，诊断服务通知的显示可以允许完成与服务通知相关联的各种服务操作。

公开(公告)号：US20120211068A1

公开(公告)日：2012-08-23

申请号：US13401181

申请日：2012-02-21

Applicant: Arthur Cornfeld ,  John Spann ,  Pravin Patel ,  Mark A. Stan ,  Benjamin Cho ,  Paul R. Sharps ,  Daniel J. Aiken

Inventor： Arthur Cornfeld ,  John Spann ,  Pravin Patel ,  Mark A. Stan ,  Benjamin Cho ,  Paul R. Sharps ,  Daniel J. Aiken

IPC: H01L31/0248 ,  H01L31/0304 ,  H01L31/18 ,  H01L31/04

CPC classification number: H01L31/06875 ,  H01L31/078 ,  H01L31/1844 ,  H01L31/1892 ,  Y02E10/544 ,  Y02P70/521

Abstract: A multijunction solar cell including an upper first solar subcell, and the base-emitter junction of the upper first solar subcell being a homojunction; a second solar subcell adjacent to said first solar subcell; a third solar subcell adjacent to said second solar subcell. A first graded interlayer is provided adjacent to said third solar subcell. A fourth solar subcell is provided adjacent to said first graded interlayer, said fourth subcell is lattice mismatched with respect to said third subcell. A second graded interlayer is provided adjacent to said fourth solar subcell; and a lower fifth solar subcell is provided adjacent to said second graded interlayer, said lower fifth subcell is lattice mismatched with respect to said fourth subcell.

Abstract translation: 一种多结太阳能电池，其包括上部第一太阳能子电池，并且所述上部第一太阳能子电池的基极 - 发射极结为同质结; 与所述第一太阳能子电池相邻的第二太阳能子电池; 与所述第二太阳能子电池相邻的第三太阳能子电池。 与所述第三太阳能子电池相邻地设置有第一梯度中间层。 与所述第一梯度中间层相邻地设置第四太阳能子电池，所述第四子电池相对于所述第三子电池晶格失配。 邻近所述第四太阳能子电池设置第二梯度中间层; 并且与所述第二梯度中间层相邻地设置较低的第五太阳能子电池，所述下部第五子电池相对于所述第四子电池晶格失配。

公开(公告)号：US08199515B2

公开(公告)日：2012-06-12

申请号：US12644558

申请日：2009-12-22

Applicant: Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

Inventor： Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

IPC: H05K7/00

CPC classification number: G06F1/185 ,  Y10T29/49147

Abstract: A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.

Abstract translation: 一种DIMM转接卡，其包括具有第一边缘，第二边缘和一个或多个面部的PCB。 PCB的第一个边缘被配置为插入主板DIMM插槽。 第一个边缘包括电耦合到存储器总线的电迹线。 DIMM转接卡包括安装在PCB的一个面上的倾斜的DIMM插槽，其中倾斜的DIMM插槽被配置为以不垂直于PCB的角度接受DIMM并将DIMM电耦合到存储器总线。 DIMM转接卡包括安装在PCB第二边缘上的跨骑式DIMM插槽。 跨骑式DIMM插槽被配置为接受DIMM并通过PCB第一边缘上的电迹线将DIMM电连接到存储器总线。

公开(公告)号：US20120084391A1

公开(公告)日：2012-04-05

申请号：US13251480

申请日：2011-10-03

Applicant: Jay Pravin Patel ,  Tomas E. Diaz ,  Sachin Chand Jaitly

Inventor： Jay Pravin Patel ,  Tomas E. Diaz ,  Sachin Chand Jaitly

IPC: G06F15/16

CPC classification number: G06Q20/209 ,  G06Q20/0453 ,  G06Q20/202 ,  G06Q20/327 ,  G06Q20/3278 ,  G06Q30/06

Abstract: A method includes receiving, at a user identification module of an electronic receipt system in electronic communication with a point of sale terminal, a user identifier transmitted from a mobile communication device to a near-field communication enabled communication device associated with the point of sale terminal. The method also includes verifying, by a validation module of the electronic receipt system, an enrollment status of the user identifier; and based on results of the verifying, transmitting, by a transfer module of the electronic receipt system, the user identifier and data characterizing an electronic receipt to a receipt storage module of the electronic receipt system.

Abstract translation: 一种方法包括：在与销售点终端进行电子通信的电子收据系统的用户识别模块处接收从移动通信设备发送到与销售点终端相关联的支持近场通信的通信设备的用户标识符 。 该方法还包括通过电子收据系统的验证模块验证用户标识符的注册状态; 并且基于通过电子收据系统的传送模块验证，将表征电子收据的用户标识符和数据发送到电子收据系统的收据存储模块的结果。

公开(公告)号：US20110149499A1

公开(公告)日：2011-06-23

申请号：US12644558

申请日：2009-12-22

Applicant: Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

Inventor： Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

IPC: G06F1/16 ,  H05K7/00 ,  H01R9/00

CPC classification number: G06F1/185 ,  Y10T29/49147

Abstract: A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.

Abstract translation: 一种DIMM转接卡，其包括具有第一边缘，第二边缘和一个或多个面部的PCB。 PCB的第一个边缘被配置为插入主板DIMM插槽。 第一个边缘包括电耦合到存储器总线的电迹线。 DIMM转接卡包括安装在PCB的一个面上的倾斜的DIMM插槽，其中倾斜的DIMM插槽被配置为以不垂直于PCB的角度接受DIMM并将DIMM电耦合到存储器总线。 DIMM转接卡包括安装在PCB第二边缘上的跨骑式DIMM插槽。 跨骑式DIMM插槽被配置为接受DIMM并通过PCB第一边缘上的电迹线将DIMM电连接到存储器总线。

公开(公告)号：US07956688B2

公开(公告)日：2011-06-07

申请号：US12574923

申请日：2009-10-07

Applicant: Rubina F. Ahmed ,  Bradley D. Herrman ,  Pravin Patel ,  Peter R. Seidel

Inventor： Rubina F. Ahmed ,  Bradley D. Herrman ,  Pravin Patel ,  Peter R. Seidel

IPC: H03F3/45 ,  H03K19/094

CPC classification number: H04L25/0274 ,  H04L25/0284

Abstract: Embodiments of the invention include a common mode cancellation circuit and method for correcting signal skew in a differential circuit. According to one embodiment, an op amp circuit is used to correct the mismatch between transmission line lengths in the differential circuit. The CMCC can be embodied as an ASIC and added on to an existing differential signaling systems to correct and compensate for board wiring skew or other causes of phase misalignment. The result is restoration of the cross-over intersection of the plus and minus signals of the differential pair closer to the common voltage level point, as if the signals had been in phase.

Abstract translation: 本发明的实施例包括用于校正差分电路中的信号偏移的共模消除电路和方法。 根据一个实施例，使用运算放大器电路来校正差分电路中的传输线路长度之间的失配。 CMCC可以实现为ASIC，并添加到现有的差分信号系统上，以纠正和补偿电路板布线偏移或相位未对准的其他原因。 结果是恢复差分对的正负信号与公共电压电平点的交叉交叉，好像信号是同相的。

公开(公告)号：US20100231209A1

公开(公告)日：2010-09-16

申请号：US12402806

申请日：2009-03-12

Applicant: Rubina F. Ahmed ,  Moises Cases ,  Bradley D. Herrman ,  Bhyrav M. Mutnury ,  Pravin Patel ,  Peter R. Seidel

Inventor： Rubina F. Ahmed ,  Moises Cases ,  Bradley D. Herrman ,  Bhyrav M. Mutnury ,  Pravin Patel ,  Peter R. Seidel

IPC: G01R31/00

CPC classification number: G01R31/2806 ,  G01R15/183

Abstract: Testing an electrical component, the component including a printed circuit board (‘PCB’) with a number of traces, the traces organized in pairs with each trace of a pair carrying current in opposite directions and separated from one another by a substrate layer of the PCB, where testing of the electrical component includes: dynamically and iteratively until a present impedance for a pair of traces of the component is greater than a predetermined threshold impedance: increasing, by an impedance varying device at the behest of a testing device, magnetic field strength of a magnetic field applied to the pair of traces by the impedance varying device, including increasing the present impedance of the pair of traces; measuring, by the testing device, one or more operating parameters; and recording, by the testing device, the measurements of the operating parameters.

Abstract translation: 测试电气部件，该部件包括具有多个迹线的印刷电路板（“PCB”），该迹线与成对的每个迹线成对地沿着相反的方向承载电流，并且彼此分离由基底层 PCB，其中电气部件的测试包括：动态地和迭代地，直到组件的一对迹线的当前阻抗大于预定阈值阻抗：通过测试装置的阻抗改变装置增加磁场 通过阻抗变化装置施加到该对迹线的磁场的强度，包括增加该对迹线的当前阻抗; 由所述测试装置测量一个或多个操作参数; 并由测试装置记录操作参数的测量值。

公开(公告)号：US09298662B2

公开(公告)日：2016-03-29

申请号：US12633441

申请日：2009-12-08

Applicant: Keith M. Campbell ,  Patrick L. Caporale ,  Caroline M. Metry ,  Pravin Patel

Inventor： Keith M. Campbell ,  Patrick L. Caporale ,  Caroline M. Metry ,  Pravin Patel

IPC: G06F13/00 ,  G06F13/40

CPC classification number: G06F13/409

Abstract: Settings are provided by a chassis management controller to an expansion card in a multi-slot server chassis. The chassis management controller in a multi-slot server chassis provides an operating parameter to a server management controller in a server, and the server management controller writes the operating parameter to a port expander of an expansion card installed on the server. The operating parameter is written to the port expander prior to expansion card power up, and the expansion card uses the operating parameter after power up to derive one or more SERDES value. The SERDES value is used to program an ASIC chip comprising a SERDES converter on the expansion card. In one example, the operating parameter is determined by the capabilities of a chassis midplane at the slot where the compute node is installed.

Abstract translation: 设备由机箱管理控制器提供给多插槽服务器机箱中的扩展卡。 多槽服务器机箱中的机箱管理控制器为服务器中的服务器管理控制器提供操作参数，服务器管理控制器将操作参数写入服务器上安装的扩展卡的端口扩展器。 在扩展卡上电之前，将操作参数写入端口扩展器，上电后扩展卡使用操作参数来导出一个或多个SERDES值。 SERDES值用于在扩展卡上对包含SERDES转换器的ASIC芯片进行编程。 在一个示例中，操作参数由安装计算节点的插槽处的机箱中面板的能力确定。

公开(公告)号：US09292867B2

公开(公告)日：2016-03-22

申请号：US13251480

申请日：2011-10-03

Applicant: Jay Pravin Patel ,  Tomas E Diaz ,  Sachin Chand Jaitly

Inventor： Jay Pravin Patel ,  Tomas E Diaz ,  Sachin Chand Jaitly

IPC: G06Q30/06 ,  G06Q20/04

CPC classification number: G06Q20/209 ,  G06Q20/0453 ,  G06Q20/202 ,  G06Q20/327 ,  G06Q20/3278 ,  G06Q30/06

Abstract: A method includes receiving, at a user identification module of an electronic receipt system in electronic communication with a point of sale terminal, a user identifier transmitted from a mobile communication device to a near-field communication enabled communication device associated with the point of sale terminal. The method also includes verifying, by a validation module of the electronic receipt system, an enrollment status of the user identifier; and based on results of the verifying, transmitting, by a transfer module of the electronic receipt system, the user identifier and data characterizing an electronic receipt to a receipt storage module of the electronic receipt system.