公开(公告)号：US08199515B2

公开(公告)日：2012-06-12

申请号：US12644558

申请日：2009-12-22

申请人： Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

发明人： Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

IPC分类号： H05K7/00

CPC分类号： G06F1/185 ,  Y10T29/49147

摘要： A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.

摘要翻译： 一种DIMM转接卡，其包括具有第一边缘，第二边缘和一个或多个面部的PCB。 PCB的第一个边缘被配置为插入主板DIMM插槽。 第一个边缘包括电耦合到存储器总线的电迹线。 DIMM转接卡包括安装在PCB的一个面上的倾斜的DIMM插槽，其中倾斜的DIMM插槽被配置为以不垂直于PCB的角度接受DIMM并将DIMM电耦合到存储器总线。 DIMM转接卡包括安装在PCB第二边缘上的跨骑式DIMM插槽。 跨骑式DIMM插槽被配置为接受DIMM并通过PCB第一边缘上的电迹线将DIMM电连接到存储器总线。

公开(公告)号：US20110149499A1

公开(公告)日：2011-06-23

申请号：US12644558

申请日：2009-12-22

申请人： Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

发明人： Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

IPC分类号： G06F1/16 ,  H05K7/00 ,  H01R9/00

CPC分类号： G06F1/185 ,  Y10T29/49147

摘要： A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.

摘要翻译： 一种DIMM转接卡，其包括具有第一边缘，第二边缘和一个或多个面部的PCB。 PCB的第一个边缘被配置为插入主板DIMM插槽。 第一个边缘包括电耦合到存储器总线的电迹线。 DIMM转接卡包括安装在PCB的一个面上的倾斜的DIMM插槽，其中倾斜的DIMM插槽被配置为以不垂直于PCB的角度接受DIMM并将DIMM电耦合到存储器总线。 DIMM转接卡包括安装在PCB第二边缘上的跨骑式DIMM插槽。 跨骑式DIMM插槽被配置为接受DIMM并通过PCB第一边缘上的电迹线将DIMM电连接到存储器总线。

公开(公告)号：US08873249B2

公开(公告)日：2014-10-28

申请号：US13439221

申请日：2012-04-04

申请人： Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

发明人： Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

IPC分类号： H05K1/11 ,  G06F1/18

CPC分类号： G06F1/185 ,  Y10T29/49147

摘要： A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.

摘要翻译： 一种DIMM转接卡，其包括具有第一边缘，第二边缘和一个或多个面部的PCB。 PCB的第一个边缘被配置为插入主板DIMM插槽。 第一个边缘包括电耦合到存储器总线的电迹线。 DIMM转接卡包括安装在PCB的一个面上的倾斜的DIMM插槽，其中倾斜的DIMM插槽被配置为以不垂直于PCB的角度接受DIMM并将DIMM电耦合到存储器总线。 DIMM转接卡包括安装在PCB第二边缘上的跨骑式DIMM插槽。 跨骑式DIMM插槽被配置为接受DIMM并通过PCB第一边缘上的电迹线将DIMM电连接到存储器总线。

公开(公告)号：US20120194992A1

公开(公告)日：2012-08-02

申请号：US13439221

申请日：2012-04-04

申请人： Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

发明人： Justin P. Bandholz ,  Brian M. Kerrigan ,  Edward J. McNulty ,  Pravin Patel ,  Peter R. Seidel ,  Philip L. Weinstein

IPC分类号： G06F1/16 ,  H05K3/30

CPC分类号： G06F1/185 ,  Y10T29/49147

摘要： A DIMM riser card that includes a PCB having a first edge, a second edge, and one or more faces. The first edge of the PCB is configured for insertion into a main board DIMM socket. The first edge includes electrical traces that electrically couple to a memory bus. The DIMM riser card includes an angled DIMM socket mounted on one face of the PCB, where the angled DIMM socket is configured to accept a DIMM at an angle not perpendicular to the PCB and electrically couple the DIMM to the memory bus. The DIMM riser card includes a straddle mount DIMM socket mounted on the second edge of the PCB. The straddle mount DIMM socket is configured to accept a DIMM and electrically couple the DIMM to the memory bus through the electrical traces on the first edge of the PCB.

摘要翻译： 一种DIMM转接卡，其包括具有第一边缘，第二边缘和一个或多个面部的PCB。 PCB的第一个边缘被配置为插入主板DIMM插槽。 第一个边缘包括电耦合到存储器总线的电迹线。 DIMM转接卡包括安装在PCB的一个面上的倾斜的DIMM插槽，其中倾斜的DIMM插槽被配置为以不垂直于PCB的角度接受DIMM并将DIMM电连接到存储器总线。 DIMM转接卡包括安装在PCB第二边缘上的跨骑式DIMM插槽。 跨骑式DIMM插槽被配置为接受DIMM并通过PCB第一边缘上的电迹线将DIMM电连接到存储器总线。

公开(公告)号：US07690927B1

公开(公告)日：2010-04-06

申请号：US12407206

申请日：2009-03-19

申请人： Brian M. Kerrigan ,  Justin P. Bandholz ,  Martin J. Crippen ,  Andrew S. Heinzmann ,  Joseph E. Maxwell ,  Edward J. McNulty ,  Pravin Patal ,  Tony C. Sass ,  Phillip L. Weinstein

发明人： Brian M. Kerrigan ,  Justin P. Bandholz ,  Martin J. Crippen ,  Andrew S. Heinzmann ,  Joseph E. Maxwell ,  Edward J. McNulty ,  Pravin Patal ,  Tony C. Sass ,  Phillip L. Weinstein

IPC分类号： H01R12/00

CPC分类号： H05K7/1492

摘要： A scalability card for use with a plurality of computer blades. The computer blades are releasably securable in a parallel configuration, wherein each blade includes a circuit board and a processor operatively coupled to the circuit board. Each processor is in electronic communication with a scalability connector on a floating plate that is loosely secured to the computer blade. Furthermore, each scalability connector is preferably disposed in a common plane extending perpendicular to the plurality of parallel computer blades. The scalability card includes a plurality of electronically interconnected scalability connectors arranged for rough alignment with the scalability connectors of each computer blade. In addition, the scalability card preferably includes at least one alignment feature for engaging each floating plate and, therefore, providing fine alignment of the scalability connector on each floating plate to one of the scalability connectors of the scalability card.

摘要翻译： 用于与多个计算机刀片一起使用的可扩展卡。 计算机刀片以可并行配置可拆卸地固定，其中每个刀片包括可操作地耦合到电路板的电路板和处理器。 每个处理器与松散地固定到计算机刀片的浮动板上的可伸缩性连接器进行电子通信。 此外，每个可伸缩性连接器优选地设置在垂直于多个平行计算机刀片延伸的公共平面中。 可扩展性卡包括多个电子互连的可伸缩性连接器，其布置成与每个计算机刀片的可伸缩性连接器粗略对准。 此外，可扩展性卡优选地包括用于接合每个浮动板的至少一个对准特征，并且因此提供每个浮动板上的可伸缩性连接器与可伸缩性卡的可伸缩性连接器之一的精细对准。

公开(公告)号：US08198878B2

公开(公告)日：2012-06-12

申请号：US12270989

申请日：2008-11-14

申请人： Justin P. Bandholz ,  Pravin Patel ,  Philip L. Weinstein

发明人： Justin P. Bandholz ,  Pravin Patel ,  Philip L. Weinstein

IPC分类号： G05F1/00

CPC分类号： H02M3/1584

摘要： Methods and apparatus for workload balancing among power switching components in a multiphase switching power supply, the power supply including one set of power switching components for each switching phase, where workload balancing includes: dropping one or more switching phases when output current demand on the power supply drops below a predetermined threshold, leaving at least one active switching phase; and rotating the at least one active switching phase among all sets of power switching components.

摘要翻译： 用于多相开关电源中的功率开关部件之间的工作负载平衡的方法和装置，所述电源包括用于每个开关阶段的一组功率开关组件，其中工作负载平衡包括：在输出电流对功率的需求时丢弃一个或多个开关阶段 供给下降到预定阈值以下，留下至少一个有效切换阶段; 以及在所有功率开关组件组之间旋转所述至少一个有源开关相位。

公开(公告)号：US20100123440A1

公开(公告)日：2010-05-20

申请号：US12270989

申请日：2008-11-14

申请人： Justin P. Bandholz ,  Pravin Patel ,  Philip L. Weinstein

发明人： Justin P. Bandholz ,  Pravin Patel ,  Philip L. Weinstein

IPC分类号： G05F1/40

CPC分类号： H02M3/1584

摘要： Methods and apparatus for workload balancing among power switching components in a multiphase switching power supply, the power supply including one set of power switching components for each switching phase, where workload balancing includes: dropping one or more switching phases when output current demand on the power supply drops below a predetermined threshold, leaving at least one active switching phase; and rotating the at least one active switching phase among all sets of power switching components.

摘要翻译： 用于多相开关电源中的功率开关部件之间的工作负载平衡的方法和装置，所述电源包括用于每个开关阶段的一组功率开关组件，其中工作负载平衡包括：在输出电流对功率的需求时丢弃一个或多个开关阶段 供给下降到预定阈值以下，留下至少一个有效切换阶段; 以及在所有功率开关组件组之间旋转所述至少一个有源开关相位。

公开(公告)号：US09646947B2

公开(公告)日：2017-05-09

申请号：US12644704

申请日：2009-12-22

申请人： Justin P. Bandholz ,  Pravin Patel ,  Peter R. Seidel

发明人： Justin P. Bandholz ,  Pravin Patel ,  Peter R. Seidel

IPC分类号： H01L23/00 ,  H01L23/64 ,  H01L25/065 ,  H01L21/66 ,  H01L25/00

CPC分类号： H01L24/48 ,  H01L22/14 ,  H01L22/20 ,  H01L23/645 ,  H01L24/45 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48092 ,  H01L2224/48227 ,  H01L2224/4847 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/2076 ,  H01L2924/30107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599

摘要： An integrated circuit (IC) that includes a semiconductor die in an IC package. The semiconductor die includes an electrical endpoint. The IC also includes a pad affixed to the semiconductor die. The pad is characterized by a capacitance and is coupled to the electrical endpoint. The IC also includes a bond wire coupling the pad to an IC package pin. The bond wire is an inductor characterized by an inductance. The inductance is configured to decrease signal degradation caused by the capacitance of the pad on electrical signals transmitted between the pin and the electrical endpoint of the semiconductor die.

公开(公告)号：US20110148543A1

公开(公告)日：2011-06-23

申请号：US12644704

申请日：2009-12-22

申请人： Justin P. Bandholz ,  Pravin Patel ,  Peter R. Seidel

发明人： Justin P. Bandholz ,  Pravin Patel ,  Peter R. Seidel

IPC分类号： H03H7/38 ,  H01L21/66 ,  H01L23/52

CPC分类号： H01L24/48 ,  H01L22/14 ,  H01L22/20 ,  H01L23/645 ,  H01L24/45 ,  H01L24/73 ,  H01L24/85 ,  H01L25/0657 ,  H01L25/50 ,  H01L2223/6611 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4809 ,  H01L2224/48092 ,  H01L2224/48227 ,  H01L2224/4847 ,  H01L2224/48599 ,  H01L2224/48699 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2225/0651 ,  H01L2225/06527 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/20751 ,  H01L2924/2076 ,  H01L2924/30107 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599

摘要： An integrated circuit (IC) that includes a semiconductor die in an IC package. The semiconductor die includes an electrical endpoint. The IC also includes a pad affixed to the semiconductor die. The pad is characterized by a capacitance and is coupled to the electrical endpoint. The IC also includes a bond wire coupling the pad to an IC package pin. The bond wire is an inductor characterized by an inductance. The inductance is configured to decrease signal degradation caused by the capacitance of the pad on electrical signals transmitted between the pin and the electrical endpoint of the semiconductor die.

摘要翻译： 一种集成电路（IC），其包括IC封装中的半导体管芯。 半导体管芯包括电端点。 IC还包括固定到半导体管芯的焊盘。 焊盘的特征在于电容并且耦合到电端点。 IC还包括将焊盘耦合到IC封装引脚的接合线。 接合线是以电感为特征的电感器。 电感被配置为降低由在半导体管芯的引脚和电端点之间传输的电信号上的焊盘的电容引起的信号劣化。

公开(公告)号：US08799570B2

公开(公告)日：2014-08-05

申请号：US11768551

申请日：2007-06-26

申请人： Justin P. Bandholz ,  Kevin M. Reinberg ,  Philip L. Weinstein

发明人： Justin P. Bandholz ,  Kevin M. Reinberg ,  Philip L. Weinstein

IPC分类号： G06F13/00 ,  G06F13/28

CPC分类号： G06F3/0664 ,  G06F3/0605 ,  G06F3/0632 ,  G06F3/067 ,  G06F3/0689

摘要： Methods, apparatus, and products are disclosed for implementing a redundant array of inexpensive drives (‘RAID’) with an external RAID controller and hard disk drives from separate computers, including configuring by the external RAID controller a RAID array, the RAID array comprising hard disk drives from the separate computers, the external RAID controller comprising a hardware RAID controller installed externally with respect to the separate computers, and storing, by one or more of the separate computers through the external RAID controller, computer data on the RAID array.

摘要翻译： 公开了用于实现具有外部RAID控制器和来自不同计算机的硬盘驱动器的廉价驱动器（“RAID”）的冗余阵列的方法，装置和产品，包括由外部RAID控制器配置RAID阵列，RAID阵列包括硬 来自独立计算机的磁盘驱动器，外部RAID控制器包括相对于单独的计算机外部安装的硬件RAID控制器，以及通过外部RAID控制器的一个或多个单独的计算机将RAID阵列上的计算机数据存储。