公开(公告)号：US20220336588A1

公开(公告)日：2022-10-20

申请号：US17718101

申请日：2022-04-11

Applicant: Richtek Technology Corporation

Inventor： Chih-Wen Hsiung ,  Chun-Lung Chang ,  Kun-Huang Yu ,  Kuo-Chin Chiu ,  Wu-Te Weng

IPC: H01L29/10 ,  H01L29/06 ,  H01L29/78 ,  H01L21/74 ,  H01L29/66

Abstract: A high voltage device includes: a semiconductor layer, a well, a body region, a body contact, a gate, a source, and a drain. The body cofntact is configured as an electrical contact of the body region. The body contact and the source overlap with each other to define an overlap region. The body contact has a depth from an upper surface of the semiconductor layer, wherein the depth is deeper than a depth of the source, whereby a part of the body contact is located vertically below the overlap region. A length of the overlap region in a channel direction is not shorter than a predetermined length, so as to suppress a parasitic bipolar junction transistor from being turning on when the high voltage device operates, wherein the parasitic bipolar junction transistor is formed by a part of the well, a part of the body region and a part of the source.

公开(公告)号：US20220321012A1

公开(公告)日：2022-10-06

申请号：US17711343

申请日：2022-04-01

Applicant: Richtek Technology Corporation

Inventor： Yong-Cyuan Chen ,  Tzu-Chen Lin ,  Yi-Wei Lee ,  Ta-Yung Yang

IPC: H02M3/158 ,  H02M1/00

Abstract: A switching regulator includes a first switch, a second switch, an inductor coupled to the first and second switches, and a control circuit. The control circuit controls the first switch to be ON for an ON time period. Next, the control circuit controls the first and second switches to be OFF for a first dead time period. Next, the control circuit controls the second switch to be ON for a synchronous rectification time period. Next, the control circuit controls the first and second switches to be OFF for a second dead time period. Next, the control circuit controls the second switch to be ON for a zero-voltage-switching pulse time period. Next, the control circuit controls the first and second switches to be OFF for a third dead time period. By the above operations, the first switch achieves soft switching.

公开(公告)号：US20220271674A1

公开(公告)日：2022-08-25

申请号：US17673062

申请日：2022-02-16

Applicant: Richtek Technology Corporation

Inventor： Ta-Yung Yang ,  Ying-Chieh Su ,  Yu-Chang Chen

IPC: H02M3/335 ,  H02M1/00

Abstract: A resonant half-bridge flyback power converter includes: a first transistor and a second transistor which form a half-bridge circuit; a transformer and a resonant capacitor connected in series and coupled to the half-bridge circuit; and a switching control circuit configured to generate a first driving signal and a second driving signal to control the first transistor and the second transistor respectively for switching the transformer to generate an output voltage. The first driving signal is configured to magnetize the transformer. The second driving signal includes at most one pulse between two consecutive pulses of the first driving signal. The switching control circuit generates a skipping cycle period when an output power is lower than a predetermined threshold. A resonant pulse of the second driving signal is skipped during the skipping cycle period. The skipping cycle period is increased in response to the decrease of the output power.

公开(公告)号：US20220271645A1

公开(公告)日：2022-08-25

申请号：US17680245

申请日：2022-02-24

Applicant: Richtek Technology Corporation

Inventor： Wei-Hsu Chang ,  Shih-Jen Yang ,  Yi-Wei Lee ,  Ta-Yung Yang

IPC: H02M1/00 ,  H02M3/335 ,  H02M3/155

Abstract: A multiple output universal serial bus travel adaptor includes: at least one AC-DC converter for converting an AC power to a first DC power; at least one DC-DC converter for providing a second DC power according to the first DC power; plural switches which are coupled to the AC-DC converter and/or the DC-DC converter to provide the first DC power or the second DC power to corresponding connectors according to operation signals; and a protocol controller configured to generate the operation signals according to at least one of the following parameters: a) the types of the connectors; b) whether there is a mobile device connected with the connectors; c) a first command from the mobile device; d) the power consumed by the mobile devices; e) the currents flowing through the connectors; and f) the voltages at the connectors.

公开(公告)号：US11418112B2

公开(公告)日：2022-08-16

申请号：US17210434

申请日：2021-03-23

Applicant: Richtek Technology Corporation

Inventor： Kuo-Chi Liu ,  Chung-Lung Pai

IPC: H02M3/07 ,  H02M1/00

Abstract: A power converter includes: capacitors; switches coupled to the corresponding capacitors, wherein the switches switch electrical connection relationships of corresponding capacitors according to operation signals; one or more charging inductors connected in series to one or more corresponding capacitors; one or more discharging inductors connected in series to one or more corresponding capacitors. In a charging process, by switching the switches, a series connection of the capacitors and the corresponding charging inductor(s) is formed between the input voltage and the output voltage, so as to form a charging path. In a discharging process, by switching the switches, each capacitor and one of the corresponding discharging inductors are connected in series between the output voltage and ground voltage level, so as to form plural discharging paths. The charging process and the discharging process are arranged in alternating and repetitive manner, to convert the input voltage to the output voltage.

公开(公告)号：US20220166312A1

公开(公告)日：2022-05-26

申请号：US17511645

申请日：2021-10-27

Applicant: Richtek Technology Corporation

Inventor： Tsung-Wei Huang ,  Ding-Yu Wei ,  Sheng-Kai Fan

IPC: H02M3/07

Abstract: A switched capacitor converter circuit includes: plural capacitors and plural switches which switch the connections of the plural capacitors periodically. In a first period, the plural switches control a first capacitor to be electrically connected between a first power and a second power, and control a second capacitor and a third capacitor to be electrically connected in series between the second power and a ground level. In a second period, the plural switches control the first capacitor and the second capacitor to be electrically connected in series between the second power and the ground, and control the third capacitor and the second capacitor to be electrically connected in parallel with the second power, thereby a second current of the second power is 4 times of a first current of the first power.

公开(公告)号：US20220157982A1

公开(公告)日：2022-05-19

申请号：US17506422

申请日：2021-10-20

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Kuo-Chin Chiu ,  Ta-Yung Yang ,  Chien-Wei Chiu ,  Wu-Te Weng ,  Chien-Yu Chen ,  Chih-Wen Hsiung ,  Chun-Lung Chang ,  Kun-Huang Yu ,  Ting-Wei Liao

IPC: H01L29/78 ,  H01L29/872 ,  H01L29/66

Abstract: A high voltage device for use as an up-side switch of a power stage circuit includes: at least one lateral diffused metal oxide semiconductor (LDMOS) device, a second conductivity type isolation region and at least one Schottky barrier diode (SBD). The LDMOS device includes: a well formed in a semiconductor layer, a body region, a gate, a source and a drain. The second conductivity type isolation region is formed in the semiconductor layer and is electrically connected to the body region. The SBD includes: a Schottky metal layer formed on the semiconductor layer and a Schottky semiconductor layer formed in the semiconductor layer. The Schottky semiconductor layer and the Schottky metal layer form a Schottky contact. In the semiconductor layer, the Schottky semiconductor layer is adjacent to and in contact with the second conductivity type isolation region.

公开(公告)号：US20220157622A1

公开(公告)日：2022-05-19

申请号：US17485339

申请日：2021-09-25

Applicant: Richtek Technology Corporation

Inventor： Heng-Chi Huang ,  Yong-Zhong Hu ,  Hao-Lin Yen

IPC: H01L21/48 ,  H01L21/683 ,  H01L21/78 ,  H01L23/373

Abstract: A chip packaging method includes: providing plural chip units; providing a base material, and placing the chip units on the base material; providing an adhesive layer to adhere a metal foil to the chip unit, wherein the metal foil is a part of the base material or additional to the base material; and cutting the chip units on the base material to form plural separated chip package units, wherein each of the chip package units includes a cut metal foil part.

公开(公告)号：US11329489B2

公开(公告)日：2022-05-10

申请号：US16666358

申请日：2019-10-28

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Wei-Hsu Chang ,  Ta-Yung Yang

IPC: H02J7/00 ,  H01M10/44 ,  H01M10/46 ,  H01M10/42

Abstract: A rechargeable battery is coupled to a power delivery unit or an external load unit. In a charging mode, the power delivery unit converts an input power to a converted voltage and/or current. A charging circuit converts the converted voltage and/or current to a charging voltage and/or current for charging the rechargeable battery. Power data is communicated between the power delivery unit and the rechargeable battery by: 1) the power delivery unit adjusting the converted voltage, wherein the power data is expressed by plural voltage levels of the converted voltage; and/or 2) the rechargeable battery adjusting a battery input current, wherein the power data is expressed by plural current levels of the battery input current. At least one of the converted voltage, the converted current, the charging voltage, or the charging current is adjusted according to the power data.

公开(公告)号：US11323299B2

公开(公告)日：2022-05-03

申请号：US17337351

申请日：2021-06-02

Applicant: Richtek Technology Corporation

Inventor： Hung-Chi Huang ,  Fu-Chi Lin ,  Tsung-Nan Wu ,  Mei-Shu Wang

IPC: H04L27/06 ,  H04L27/156 ,  H04L1/00

Abstract: A communication signal demodulation apparatus demodulates a communication signal to generate an output signal. The communication signal demodulation apparatus includes: plural sensor circuits which sense different electrical characteristics of one same communication signal and generate corresponding sensing modulation signals respectively; plural processing filters which filter the corresponding sensing modulation signals respectively and generate corresponding filtered modulation signals respectively; plural demodulators which demodulate the plural filtered modulation signals and generate corresponding demodulation signals respectively, wherein each of the filtered modulation signals corresponds to at least one of the demodulators; and a determination circuit which receive the plural demodulation signals, determine whether each unit signal of each of the demodulation signals is correct or not according to a determination mechanism, and combine one or more correct unit signals to generate the output signal.