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公开(公告)号：US10474408B2
公开(公告)日：2019-11-12
申请号：US15698224
申请日：2017-09-07
Applicant: Apple Inc.
Inventor： Peter F. Holland , Mahesh B. Chappalli , David L. Bowman
Abstract: Systems and methods for improving operation of an electronic device, which includes an image data processing pipeline that processes input image data. In the processing pipeline, a first processing block generates first processed image data by performing a first function on the input image data; another one or more processing blocks, which includes a second processing block coupled to a first output of the first processing block, generates second processed image data by performing a second function on the first processed image data when received from the first processing block; and a third processing block coupled to the first output and a second output of the other one or more processing blocks performs a third function on the first processed image data when received from the first processing block and performs the third function on the second processed image data when received from the other one or more processing blocks.
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公开(公告)号：US20190340971A1
公开(公告)日：2019-11-07
申请号：US16515952
申请日：2019-07-18
Applicant: APPLE INC.
Abstract: Devices and methods for underrun compensation are provided. By way of example, a technique for underrun compensation includes determining a particular one of a plurality of pixel configurations for a display. When an underrun condition is detected during processing of first image data via an image processing pipeline, at least a portion of requested image data for downstream processing has not yet been provided by an upstream processing component. Accordingly, upon detecting an underrun condition, underrun pixel data for the at least portion of the requested image data is generated, based upon the particular one of the plurality of pixel configurations.
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公开(公告)号：US10102131B2
公开(公告)日：2018-10-16
申请号：US14870272
申请日：2015-09-30
Applicant: Apple Inc.
Inventor： Gurjeet S. Saund , Peter F. Holland
IPC: G06F12/08 , G06F1/32 , G06F12/0831 , G06F12/0897 , G09G5/00
Abstract: Methods and mechanisms for improved performance in a system with power management are described. A system includes a data storage device configured to store data and a display control unit configured to retrieve data from the data storage device. The data storage device may be placed in a reduced power state that results in increased latencies for accessing data within the device. The display control unit is configured to monitor an amount of data available for processing within the display control unit. In response to determining the amount of data has fallen to a threshold level, and in anticipation of a forthcoming data access request, the display control unit conveys an indication that prevents the data storage device from entering or remaining in the reduced power state. Subsequently, the display control unit conveys a request for data to the data storage device which will not be in the reduced power state.
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公开(公告)号：US09747658B2
公开(公告)日：2017-08-29
申请号：US14019909
申请日：2013-09-06
Applicant: Apple Inc.
Inventor： Peter F. Holland , Albert C. Kuo , Hao Chen
IPC: G06T1/20
CPC classification number: G06T1/20
Abstract: Embodiments of an apparatus and method are disclosed that may allow for arbitrating multiple read requests to fetch pixel data from a memory. The apparatus may include a first and a second processing pipeline, and a control unit. Each of the processing pipelines may be configured to generate a plurality of read requests to fetch a respective one of a plurality of portions of stored pixel data. The control unit may be configured to determine a priority for each read request dependent upon display coordinates of one or more pixels corresponding to each of the plurality of portions of stored pixel data, and determine an order for the plurality of read requests dependent upon the determined priority for each read request.
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公开(公告)号：US09691349B2
公开(公告)日：2017-06-27
申请号：US14676544
申请日：2015-04-01
Applicant: Apple Inc.
Inventor： Brijesh Tripathi , Peter F. Holland , Guy Cote
CPC classification number: G09G5/02 , G09G5/363 , G09G5/391 , G09G2340/0428 , G09G2360/02
Abstract: Systems, apparatuses, and methods for passing source pixel data through a display control unit. A display control unit includes N-bit pixel component processing lanes for processing source pixel data. When the display control unit receives M-bit source pixel components, wherein ‘M’ is greater than ‘N’, the display control unit may assign the M-bit source pixel components to the N-bit processing lanes. Then, the M-bit source pixel components may passthrough the pixel component processing elements of the display control unit without being modified.
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Patent Agency Ranking
公开(公告)号：US20170091100A1
公开(公告)日：2017-03-30
申请号：US14870272
申请日：2015-09-30
Applicant: Apple Inc.
Inventor： Gurjeet S. Saund , Peter F. Holland
CPC classification number: G06F12/0831 , G06F1/3218 , G06F1/3265 , G06F1/3275 , G06F1/3287 , G06F12/0897 , G06F2212/1016 , G06F2212/1028 , G09G5/363 , G09G2330/021 , G09G2360/08 , G09G2360/121 , Y02D10/13
Abstract: Methods and mechanisms for improved performance in a system with power management are described. A system includes a data storage device configured to store data and a display control unit configured to retrieve data from the data storage device. The data storage device may be placed in a reduced power state that results in increased latencies for accessing data within the device. The display control unit is configured to monitor an amount of data available for processing within the display control unit. In response to determining the amount of data has fallen to a threshold level, and in anticipation of a forthcoming data access request, the display control unit conveys an indication that prevents the data storage device from entering or remaining in the reduced power state. Subsequently, the display control unit conveys a request for data to the data storage device which will not be in the reduced power state.
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公开(公告)号：US20160307540A1
公开(公告)日：2016-10-20
申请号：US14691353
申请日：2015-04-20
Applicant: Apple Inc.
Inventor： Peter F. Holland , Brijesh Tripathi , Guy Cote
IPC: G09G5/02
CPC classification number: G09G5/14 , G09G5/026 , G09G2320/0242 , G09G2320/0666 , G09G2320/0673 , G09G2340/06 , G09G2360/18
Abstract: Systems, apparatuses, and methods for performing linear scaling in a display control unit. A display control unit receives source image data that has already been gamma encoded with an unknown gamma value. The display control unit includes a hard-coded LUT storing a gamma curve of a first gamma value which is used to perform a degamma operation on the received source image data. Even if the first gamma value used to perform the degamma operation is different from the gamma value used to gamma encode the source image data, fewer visual artifacts are generated as compared with not performing a degamma operation. After the degamma operation is performed, the source image data may be linearly scaled.
Abstract translation: 用于在显示控制单元中执行线性缩放的系统，装置和方法。 显示控制单元接收已经用未知伽马值进行伽马编码的源图像数据。 显示控制单元包括硬编码LUT，其存储用于对所接收的源图像数据执行去角度运算的第一伽玛值的伽马曲线。 即使用于进行反伽马操作的第一伽马值与用于对源图像数据进行伽玛编码的伽马值不同，与不进行除血操作相比，产生较少的视觉伪影。 在执行去雾操作之后，可以线性地缩放源图像数据。
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公开(公告)号：US09471955B2
公开(公告)日：2016-10-18
申请号：US14309645
申请日：2014-06-19
Applicant: Apple Inc.
Inventor： Peter F. Holland , Brijesh Tripathi , Dinesh M. Shedge
CPC classification number: G06T1/60 , G06F3/1438 , G06T1/20 , G09G5/399 , G09G2310/0221 , G09G2352/00 , G09G2360/06
Abstract: Systems, apparatuses, and methods for driving a split display with multiple display pipelines. Frames for driving a display are logically divided into portions, a first display pipeline drives a first portion of the display, and a second display pipeline drives a second portion of the display. To ensure synchronization between the two display pipelines, a repeat vertical blanking interval (VBI) signal is generated if either of the display pipelines has not already received the frame packet with configuration data for the next frame. When the repeat VBI signal is generated, both display pipelines will repeat processing of the current frame.
Abstract translation: 用多个显示管道驱动分割显示的系统，设备和方法。 用于驱动显示器的框架被逻辑地分为多个部分，第一显示管道驱动显示器的第一部分，第二显示管线驱动显示器的第二部分。 为了确保两个显示管道之间的同步，如果显示管道中的任一个还没有接收到具有下一帧的配置数据的帧分组，则生成重复垂直消隐间隔（VBI）信号。 当产生重复VBI信号时，两条显示管道将重复对当前帧的处理。
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39.发明申请公开(公告)号：US20150287351A1
公开(公告)日：2015-10-08
申请号：US14247373
申请日：2014-04-08
Applicant: Apple Inc.
Inventor： Peter F. Holland , Craig M. Okruhlica
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2330/022 , G09G2360/08 , G09G2360/14
Abstract: A system includes one or more video processing components and a display processing unit. The display processing unit may include one or more processing pipelines that generate read requests to fetch stored pixel data from a memory for subsequent display on a display unit. The display processing unit may also include a timing control unit that may generate an indication that indicates that the display unit will enter an inactive state. In response to receiving the indication, one or more of the video processing components may enter a low power state.
Abstract translation: 系统包括一个或多个视频处理组件和显示处理单元。 显示处理单元可以包括一个或多个处理管线，其生成读取请求以从存储器提取存储的像素数据，以便随后在显示单元上显示。 显示处理单元还可以包括定时控制单元，其可以生成指示显示单元将进入非活动状态的指示。 响应于接收到指示，一个或多个视频处理组件可以进入低功率状态。
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40.发明授权公开(公告)号：US09153212B2
公开(公告)日：2015-10-06
申请号：US13850548
申请日：2013-03-26
Applicant: Apple Inc.
Inventor： Brijesh Tripathi , Peter F. Holland , Albert C. Kuo
CPC classification number: G09G5/395 , G06F3/14 , G09G5/001 , G09G5/393 , G09G2330/02 , G09G2330/021 , G09G2340/02 , G09G2360/121
Abstract: In an embodiment, a display pipe is configured to composite one or more frames of images and/or video sequences to generate output frames for display. Additionally, the display pipe may be configured to compress an output frame and write the compressed frame to memory responsive to detecting static content in the output frames. The display pipe may also be configured to read the compressed frame from memory for display instead of reading the frames for compositing and display. In some embodiments, the display pipe may include an idle screen detect circuit configured to monitor the operation of the display pipe and/or the output frames to detect the static content.
Abstract translation: 在一个实施例中，显示管被配置为组合一个或多个图像帧和/或视频序列以产生用于显示的输出帧。 此外，显示管可以被配置为响应于检测输出帧中的静态内容而压缩输出帧并将压缩帧写入存储器。 显示管还可以被配置为从存储器读取压缩帧用于显示，而不是读取用于合成和显示的帧。 在一些实施例中，显示管道可以包括被配置为监视显示管道和/或输出框架的操作以检测静态内容的空闲屏幕检测电路。
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