公开(公告)号：US20050145915A1

公开(公告)日：2005-07-07

申请号：US10753030

申请日：2004-01-06

申请人： Badredin Fatemizadeh ,  Ali Salih

发明人： Badredin Fatemizadeh ,  Ali Salih

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L27/108

CPC分类号： H01L27/088 ,  H01L21/823487 ,  H01L29/66734

摘要： A semiconductor device has a driver device (10) in proximity to a power device (12). In making the semiconductor device, an N+ layer (24) is formed on a substrate (22). A portion of the N+ layer is removed, substantially down to the substrate, to provide a layer offset (28) between the driver device area and the power device area. An epi region of uniform thickness is formed over the driver device and power device areas. The epi region has a similar offset as the layer offset. The epi region is planarized so that the epi region over the power device area has less thickness than the epi region over the driver device area. The driver devices are formed in first and second wells (36, 38) in the thicker area of the epi region. The power device is formed in the third well (40) in the thinner area of the epi region.

摘要翻译： 半导体器件具有靠近功率器件（12）的驱动器器件（10）。 在制造半导体器件时，在衬底（22）上形成N +层（24）。 N +层的一部分基本上被去除到衬底，以在驱动器器件区域和功率器件区域之间提供层偏移（28）。 在驱动器设备和功率器件区域上形成均匀厚度的外延区域。 epi区域具有与层偏移相似的偏移。 epi区域被平坦化，使得功率器件区域上的epi区域具有比驱动器器件区域上的epi区域更小的厚度。 驱动器器件形成在第一和第二阱（36,38）中，在epi区域的较厚区域中。 功率器件形成在epi区域的较薄区域中的第三阱（40）中。

公开(公告)号：US5949124A

公开(公告)日：1999-09-07

申请号：US999889

申请日：1997-05-09

申请人： Peyman Hadizad ,  Zheng Shen ,  Ali Salih

发明人： Peyman Hadizad ,  Zheng Shen ,  Ali Salih

IPC分类号： H01L23/58 ,  H01L29/06

CPC分类号： H01L23/585 ,  H01L29/0661 ,  H01L2924/0002

摘要： An edge termination structure is created by forming trench structures (14) near a PN junction. The presence of the trench structures (14) extends a depletion region (13) between a doped region (12) and a body of semiconductor material or a semiconductor substrate (11) of the opposite conductivity type away from the doped region (12). This in turn forces junction breakdown to occur in the semiconductor bulk, leading to enhancement of the breakdown voltage of a semiconductor device (10). A surface of the trench structures (14) is covered with a conductive layer (16) which keeps the surface of the trench structures (14) at an equal voltage potential. This creates an equipotential surface across each of the trench structures (14) and forces the depletion region to extend laterally along the surface of semiconductor substrate (11). The conductive layers (16) are electrically isolated from an electrical contact (17) which contacts the doped region (12) and from the conductive layers (16) of neighboring trench structures (14).

摘要翻译： 通过在PN结附近形成沟槽结构（14）来产生边缘终端结构。 沟槽结构（14）的存在延伸了掺杂区域（12）和半导体材料体之间的耗尽区（13）或者与掺杂区域（12）相反的导电类型的半导体衬底（11）。 这又导致在半导体体中发生结击穿，导致半导体器件（10）的击穿电压的提高。 沟槽结构（14）的表面被导电层（16）覆盖，导电层保持沟槽结构（14）的表面处于相等的电压电位。 这产生跨越每个沟槽结构（14）的等势面，并迫使耗尽区沿着半导体衬底（11）的表面横向延伸。 导电层（16）与接触掺杂区域（12）的电触点（17）和相邻沟槽结构（14）的导电层（16）电隔离。

公开(公告)号：US08003478B2

公开(公告)日：2011-08-23

申请号：US12134401

申请日：2008-06-06

申请人： Mark Duskin ,  Suem Ping Loo ,  Ali Salih

发明人： Mark Duskin ,  Suem Ping Loo ,  Ali Salih

IPC分类号： H01L21/20

CPC分类号： H01L27/0814 ,  H01L27/0255 ,  H01L29/0642 ,  H01L29/861 ,  H01L29/866 ,  Y10S438/983

摘要： In one embodiment, a bi-directional diode structure is formed to have a substantially symmetrical current-voltage characteristic.

摘要翻译： 在一个实施例中，形成双向二极管结构以具有基本对称的电流 - 电压特性。

公开(公告)号：US07205605B2

公开(公告)日：2007-04-17

申请号：US10842393

申请日：2004-05-10

申请人： Peyman Hadizad ,  Jina Shumate ,  Ali Salih

发明人： Peyman Hadizad ,  Jina Shumate ,  Ali Salih

IPC分类号： H01L29/76

CPC分类号： H01L29/66734 ,  H01L21/2254 ,  H01L21/2257 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/66727 ,  H01L29/7802 ,  H01L29/7813

摘要： A semiconductor component includes a semiconductor layer (110) having a trench (326). The trench has first and second sides. A portion (713) of the semiconductor layer has a conductivity type and a charge density. The semiconductor component also includes a control electrode (540, 1240) in the trench. The semiconductor component further includes a channel region (120) in the semiconductor layer and adjacent to the trench. The semiconductor component still further includes a region (755) in the semiconductor layer. The region has a conductivity type different from that of the portion of the semiconductor layer. The region also has a charge density balancing the charge density of the portion of the semiconductor layer.

摘要翻译： 半导体部件包括具有沟槽（326）的半导体层（110）。 沟渠有第一面和第二面。 半导体层的一部分（713）具有导电类型和电荷密度。 半导体部件还包括沟槽中的控制电极（540,1240）。 半导体部件还包括在半导体层中并且与沟槽相邻的沟道区域（120）。 半导体部件还包括半导体层中的区域（755）。 该区域具有与半导体层的部分不同的导电类型。 该区域还具有平衡半导体层部分的电荷密度的电荷密度。

公开(公告)号：US5102810A

公开(公告)日：1992-04-07

申请号：US684682

申请日：1991-04-11

申请人： Ali Salih

发明人： Ali Salih

IPC分类号： H01L21/20 ,  H01L21/322 ,  H01L21/329 ,  H01L29/165 ,  H01L29/32

CPC分类号： H01L29/32 ,  H01L21/3221 ,  H01L29/165 ,  H01L29/66136 ,  Y10S148/011 ,  Y10S148/06

摘要： The switching speed of bipolar power rectifiers is increased by formation of misfit dislocations in the depletion region, spaced from the substrate/epitaxial layer interface, in order to reduce minority carrier lifetime. The misfit dislocations are formed by the introduction of germanium during epitaxy, and are distributed along the silicon/silicon-germanium interface. Preferably, the germanium containing layer is located proximate the center of the depletion region.

公开(公告)号：US20120091504A1

公开(公告)日：2012-04-19

申请号：US12907633

申请日：2010-10-19

申请人： T. Jordan Davis ,  Ali Salih

发明人： T. Jordan Davis ,  Ali Salih

IPC分类号： H01L29/866 ,  H01L21/329

CPC分类号： H01L27/0255 ,  H01L29/861 ,  H01L29/8611 ,  H01L29/866 ,  H03F2200/444

摘要： In one embodiment, a bi-directional ESD device is formed to have a third harmonic at frequencies no less than about one gigahertz wherein the third harmonic has a magnitude that is no greater than about minus thirty five dBm.

摘要翻译： 在一个实施例中，双向ESD器件形成为具有不小于约1千兆赫兹频率的三次谐波，其中三次谐波具有不大于约零三十五dBm的幅度。

公开(公告)号：US08138520B2

公开(公告)日：2012-03-20

申请号：US13177785

申请日：2011-07-07

申请人： Mark Duskin ,  Suem Ping Loo ,  Ali Salih

发明人： Mark Duskin ,  Suem Ping Loo ,  Ali Salih

IPC分类号： H01L29/66

CPC分类号： H01L27/0814 ,  H01L27/0255 ,  H01L29/0642 ,  H01L29/861 ,  H01L29/866 ,  Y10S438/983

摘要： In one embodiment, a bi-directional diode structure is formed to have a substantially symmetrical current-voltage characteristic.

摘要翻译： 在一个实施例中，形成双向二极管结构以具有基本对称的电流 - 电压特性。

公开(公告)号：US20050230745A1

公开(公告)日：2005-10-20

申请号：US10828773

申请日：2004-04-20

申请人： Badredin Fatemizadeh ,  Ali Salih

发明人： Badredin Fatemizadeh ,  Ali Salih

IPC分类号： H01L21/3205 ,  H01L29/10 ,  H01L29/72 ,  H01L29/808

CPC分类号： H01L29/8083 ,  H01L29/1066

摘要： A junction field effect transistor (JFET) has a gate region, drain region, and a source region. An epitaxial region having a first conductivity type is disposed over the drain region. The first conductivity type is N-type semiconductor material. The gate region is disposed within a trench which is formed in the epitaxial region. A P+ region is disposed within the epitaxial region and under the gate region. The P+ region has a first doping concentration of a second conductivity type opposite the first conductivity type. A P− region is disposed under the P+ region. The P− region has a second doping concentration of the second conductivity type which is less than the first doping concentration. The P− region may be disposed adjacent to a first portion of the P+ region while another P− region is disposed adjacent to a second portion of the P+ region. The P+ region may be implanted from the gate region deep into the epitaxial region.

摘要翻译： 结型场效应晶体管（JFET）具有栅极区域，漏极区域和源极区域。 具有第一导电类型的外延区域设置在漏极区域上。 第一导电类型是N型半导体材料。 栅极区域设置在形成在外延区域中的沟槽内。 P +区域设置在外延区域内并在栅极区域下方。 P +区域具有与第一导电类型相反的第二导电类型的第一掺杂浓度。 P区域设置在P +区域的下方。 P-区具有小于第一掺杂浓度的第二导电类型的第二掺杂浓度。 P-区可以被布置成与P +区的第一部分相邻，而另一个P-区邻近P +区的第二部分设置。 P +区域可以从栅极区域深深地注入到外延区域中。

公开(公告)号：US20050161764A1

公开(公告)日：2005-07-28

申请号：US10767384

申请日：2004-01-28

申请人： Badredin Fatemizadeh ,  Ali Salih

发明人： Badredin Fatemizadeh ,  Ali Salih

IPC分类号： H01L21/762 ,  H01L21/8234 ,  H01L21/84 ,  H01L27/12 ,  H01L21/336 ,  H01L29/00

CPC分类号： H01L29/7813 ,  H01L21/76283 ,  H01L21/823481 ,  H01L21/84 ,  H01L27/1203

摘要： A semiconductor device has a driver device (10) in proximity to a power device (12). In making the semiconductor device, an N+ layer (24) is formed on a substrate (22). A portion of the N+ layer is removed, substantially down to the substrate, to provide a layer offset (28) between the driver device area and power device area. An epi region of uniform thickness is formed over the driver device and power device areas. A portion of the epi layer is removed to provide another layer offset (70). An oxide layer (68) of uniform thickness is formed over the epi region. The oxide layer is planarized to remove oxide layer over the N+ layer. An oxide-filled trench (80) is formed between the driver device and the power device. The oxide-filled trench extends down to the oxide layer to isolate the driver device from the power device.

摘要翻译： 半导体器件具有靠近功率器件（12）的驱动器器件（10）。 在制造半导体器件时，在衬底（22）上形成N +层（24）。 N +层的一部分基本上被去除到衬底，以在驱动器器件区域和功率器件区域之间提供层偏移（28）。 在驱动器设备和功率器件区域上形成均匀厚度的外延区域。 去除外延层的一部分以提供另一层偏移（70）。 在epi区域上形成均匀厚度的氧化物层（68）。 将氧化物层平坦化以除去N +层上的氧化物层。 在驱动器装置和功率装置之间形成氧化物填充的沟槽（80）。 氧化物填充的沟槽向下延伸到氧化物层以将驱动器器件与功率器件隔离。

公开(公告)号：US06344379B1

公开(公告)日：2002-02-05

申请号：US09426108

申请日：1999-10-22

申请人： Prasad Venkatraman ,  Ali Salih

发明人： Prasad Venkatraman ,  Ali Salih

IPC分类号： H01L21337

CPC分类号： H01L29/7802 ,  H01L29/0696 ,  H01L29/4238

摘要： A transistor (30) uses a single continuous base region (40) with an undulating structure. The semiconductor device is an insulated gate field effect transistor having a semiconductor substrate with a plurality of doped base branches, which extend into the semiconductor substrate, form into a single base region for the entire transistor. Each of the plurality of base branches (82) is undulating and of substantially constant width, and each of the base branches undulates in-phase with the immediately adjacent base branches. A continuous gate layer (34) overlies the semiconductor substrate and is self-aligned to the plurality of base branches. The undulating structure of the base region improves channel density, and thus lowers on-resistance, and the use of a single base region ensures that all portions of the base region throughout the device will be at a substantially constant electric potential.

摘要翻译： 晶体管（30）使用具有起伏结构的单个连续基极区域（40）。 半导体器件是具有半导体衬底的绝缘栅场效应晶体管，该半导体衬底具有多个掺杂的基极分支，其延伸到半导体衬底中，形成整个晶体管的单个基极区域。 多个基部分支（82）中的每一个都是起伏且基本上恒定的宽度，并且每个基部分支与紧邻的基部分支同相起伏。 连续栅极层（34）覆盖在半导体衬底上并与多个基极分支自对准。 基极区域的起伏结构改善了通道密度，从而降低了导通电阻，并且使用单个基极区确保了整个器件中的基极区域的所有部分将处于基本恒定的电位。