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公开(公告)号：US20240134811A1
公开(公告)日：2024-04-25
申请号：US18383833
申请日：2023-10-24
Applicant: Amazon Technologies, Inc.
Inventor： Islam Atta , Christopher Joseph Pettey , Asif Khan , Robert Michael Johnson , Mark Bradley Davis , Erez Izenberg , Nafea Bshara , Kypros Constantinides
CPC classification number: G06F13/4068 , G06F9/44505 , G06F13/4282 , G06F15/7867 , G06F15/7871
Abstract: The following description is directed to a configurable logic platform. In one example, a configurable logic platform includes host logic and a reconfigurable logic region. The reconfigurable logic region can include logic blocks that are configurable to implement application logic. The host logic can be used for encapsulating the reconfigurable logic region. The host logic can include a host interface for communicating with a processor. The host logic can include a management function accessible via the host interface. The management function can be adapted to cause the reconfigurable logic region to be configured with the application logic in response to an authorized request from the host interface. The host logic can include a data path function accessible via the host interface. The data path function can include a layer for formatting data transfers between the host interface and the application logic.
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公开(公告)号：US11316733B1
公开(公告)日：2022-04-26
申请号：US16386101
申请日：2019-04-16
Applicant: Amazon Technologies, Inc.
IPC: H04L12/24 , H04L41/0813 , G06F9/445 , G06F9/455 , G06F13/10
Abstract: Disclosed are techniques regarding aspects of implementing client configurable logic within a computer system. The computer system can be a cloud infrastructure. The techniques can include associating signature information with the client configurable logic for various purposes.
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公开(公告)号：US11119150B2
公开(公告)日：2021-09-14
申请号：US16422725
申请日：2019-05-24
Applicant: Amazon Technologies, Inc.
Inventor： Mark Bradley Davis , Christopher Joseph Pettey , Asif Khan , Islam Mohamed Hatem Abdulfattah Mohamed Atta
IPC: G01R31/28 , G01R31/317 , G01R31/3177 , G06F11/36 , G06F9/50
Abstract: Methods and apparatus are disclosed for programming reconfigurable logic devices such as FPGAs in a multi-tenant server environment. In one example, a computing host includes one or more processors configured to execute a supervisor process and two or more user processes and a single FPGA integrated circuit configured into a plurality of partitions. The partitions include a host logic partition that is accessible only to the supervisor process executing on the computing host, and two or more accelerator partitions. Each of the accelerator partitions is configured to include a virtual debug unit with a logic analyzer that collects logic signals generated by logic within the respective accelerator partition and sends debug data indicating values of the logic signals to one of the user processes. In some examples, the host logic partitions and/or the accelerator partitions can be independently reprogrammed of each other within their respective portions of the single FPGA.
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公开(公告)号：US10798380B1
公开(公告)日：2020-10-06
申请号：US16357084
申请日：2019-03-18
Applicant: Amazon Technologies, Inc.
Inventor： Kiran Kalkunte Seshadri , Asif Khan
IPC: H04N19/109 , H04N19/105 , H04N19/176 , H04N19/184 , H04N19/51 , H04N19/139
Abstract: Reference data is one type of data that the video accelerator may frequently be read from external memory. In various examples, the video accelerator can adaptively select inter-prediction modes based on the bandwidth to external memory that is available at any point in time. The video accelerator can determine the amount of bandwidth that is available, and when the bandwidth is insufficient for obtaining reference data for all possible inter-prediction modes, the video accelerator can use the encoding parameters of a neighboring block to select an inter-prediction mode to use. The video accelerator can then obtain a reference window for the selected inter-prediction mode, and perform prediction using the inter-prediction mode and the reference window.
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公开(公告)号：US10764129B2
公开(公告)日：2020-09-01
申请号：US15634940
申请日：2017-06-27
Applicant: Amazon Technologies, Inc.
Inventor： Asif Khan , Islam Mohamed Hatem Abdulfattah Mohamed Atta , Christopher Joseph Pettey , Kiran Kalkunte Seshadri , Nafea Bshara
IPC: G06F15/16 , H04L12/24 , G06F13/28 , H04L29/08 , H04L12/46 , G06F15/78 , G06F30/34 , G06F30/327 , G06F30/392 , G06F30/394 , G06F30/3323
Abstract: The following description is directed to a logic repository service supporting adaptable host logic. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic. The method can include selecting a particular host logic shell from a group of host logic shells. The particular host logic shell can be used to encapsulate the application logic when the configurable hardware is configured. Configuration data for the configurable hardware can be generated. The configuration data can include data for implementing the application logic and at least a portion of the particular host logic shell. The method can include receiving a second request to download the configuration data to a host server computer comprising the configurable hardware. The configuration data can be transmitted to the host server computer in response to the second request.
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Patent Agency Ranking
公开(公告)号：US10592322B1
公开(公告)日：2020-03-17
申请号：US15634696
申请日：2017-06-27
Applicant: Amazon Technologies, Inc.
Inventor： Kiran Kalkunte Seshadri , Sundeep Amirineni , Nafea Bshara , Asif Khan
Abstract: Disclosed herein are techniques for preventing or minimizing completion timeout errors on a computer device. An apparatus includes a processing logic circuit configured to perform transactions requested by a requester device, and a timeout prevention logic coupled to the processing logic circuit. The timeout prevention logic includes a timeout logic and a moderation logic. The timeout logic is configured to, when the processing logic circuit fails to complete a particular transaction requested by the requester device within a reconfigurable time period, generate a timeout event and complete the particular requested transaction. The moderation logic is configured to determine a number of timeout events generated by the timeout logic during a monitoring time period, and set the reconfigurable time period based on the number of timeout events generated by the timeout logic during the monitoring time period.
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公开(公告)号：US10282502B1
公开(公告)日：2019-05-07
申请号：US15452605
申请日：2017-03-07
Applicant: Amazon Technologies, Inc.
Inventor： Nafea Bshara , Islam Mohamed Hatem Abdulfattah Mohamed Atta , Prateek Tandon , Asif Khan , Kiran Kalkunte Seshadri
IPC: G06F17/50
Abstract: Technologies are provided for automatically performing multiple integrated circuit implementation runs with variations of input design constraints. Input design constraints can be automatically adjusted to create multiple modified versions of the design constraints. The multiple modified design constraints can be used to perform separate integrated circuit implementation runs for a given circuit design. Results of the multiple implementation runs can be analyzed, and a circuit implementation report can be generated based on the results of the runs performed with the various modified design constraints. In some embodiments, a circuit implementation recommendation can be generated based on the implementation run results. In at least some scenarios, the multiple implementation runs can be performed using multiple synthesis and implementation processes. The multiple synthesis and implementation processes can be distributed across one or more host computing devices.
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公开(公告)号：US10248607B1
公开(公告)日：2019-04-02
申请号：US15887613
申请日：2018-02-02
Applicant: Amazon Technologies, Inc.
Inventor： Mark Bradley Davis , Asif Khan
Abstract: An electronics adapter and method are disclosed herein. The electronics adapter can include a plurality of interface ports, with each interface port from the device coupled to a processor from a plurality of processors, and a controller communicatively coupled to the interface ports. The controller may be configured to determine a function or transaction attributes, which are serviced by instructions executed by one of the processors. The controller may be further configured to determine at least one interface port on the adapter to transmit the transaction based on the function or the attributes using an updatable mapping between the function or the attributes and the interface port, and transmit a request for the transaction using the interface port for processing of the transaction by the processor coupled to the interface port.
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公开(公告)号：US10185675B1
公开(公告)日：2019-01-22
申请号：US15384074
申请日：2016-12-19
Applicant: Amazon Technologies, Inc.
Inventor： Kiran Kalkunte Seshadri , Thomas A. Volpe , Carlos Javier Cabral , Steven Scott Larson , Asif Khan
Abstract: Peripheral devices may implement multiple reporting modes for signal interrupts to a host system. Different reporting modes may be determined for interrupts generated at a host system. Reporting modes may be programmatically configured for various operations at the peripheral device. Reporting modes may indicate a reporting technique for transmitting an indication of the interrupt and may indicate a priority assigned to reporting the interrupt. An interrupt controller for the peripheral device may report generated interrupts according to the reporting mode determined for the interrupts.
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公开(公告)号：US20180302281A1
公开(公告)日：2018-10-18
申请号：US15634940
申请日：2017-06-27
Applicant: Amazon Technologies, Inc.
Inventor： Asif Khan , Islam Mohamed Hatem Abdulfattah Mohamed Atta , Christopher Joseph Pettey , Kiran Kalkunte Seshadri , Nafea Bshara
Abstract: The following description is directed to a logic repository service supporting adaptable host logic. In one example, a method of a logic repository service can include receiving a first request to generate configuration data for configurable hardware using a specification for application logic. The method can include selecting a particular host logic shell from a group of host logic shells. The particular host logic shell can be used to encapsulate the application logic when the configurable hardware is configured. Configuration data for the configurable hardware can be generated. The configuration data can include data for implementing the application logic and at least a portion of the particular host logic shell. The method can include receiving a second request to download the configuration data to a host server computer comprising the configurable hardware. The configuration data can be transmitted to the host server computer in response to the second request.
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