Single power plane dynamic voltage margin recovery for multiple clock domains

    公开(公告)号:US10401938B1

    公开(公告)日:2019-09-03

    申请号:US15483178

    申请日:2017-04-10

    Applicant: Apple Inc.

    Abstract: Systems, apparatuses, and methods for reaching power targets across different clock domains are described. In various embodiments, a first processor complex and a second processor complex operate while powered by a same, single power plane, but with respective clock domains. When a request is detected to change an operating mode of a particular core from one of the processor complexes to an operating mode which does not provide the worst-case power supply load on the single power plane, an amount of voltage margin to recover from the operational voltage is determined based on the second operating mode prior to granting the request and based on each other core in the complexes operating in respective current operating modes. An operational voltage less the determined voltage margin to recover is assigned to the processor complexes while different clock frequencies are assigned to the processor complexes.

    Dynamic voltage and frequency management based on active processors

    公开(公告)号:US10303238B2

    公开(公告)日:2019-05-28

    申请号:US15609915

    申请日:2017-05-31

    Applicant: Apple Inc.

    Abstract: In an embodiment, a system may include multiple processors and an automatic power state controller (APSC) configured to switch the processors between various operating points. The operating points may be described by data programmed into the APSC, and the APSC may include a register that is programmable with a target operating point request identifying a target operating point for the processors from among the described operating points. The data describing the operating points may also include an indication of whether or not the number of processors that may be concurrently active at the operating point is limited. Based on the indication and the number of active processors, the APSC may override the requested operating point with a reduced operating point. In some embodiments, a digital power estimator (DPE) may monitor operation of the processors and may throttle the processors when high power consumption is detected.

    Digital power estimator to control processor power consumption

    公开(公告)号:US09817469B2

    公开(公告)日:2017-11-14

    申请号:US14918781

    申请日:2015-10-21

    Applicant: Apple Inc.

    Inventor: Jong-Suk Lee

    Abstract: In an embodiment, a digital power estimator (DPE) may be provided that may monitor the processors to estimate the amount of power being consumed. If the estimate exceeds a power threshold, the DPE may throttle one or more of the processors. Additionally, throttling events may be monitored to determine if a change in the operating point is desired. In one embodiment, the DPE throttling events may be counted, and if the counts exceed a count threshold, a change in the operating point to a reduced operation point may be requested. Additionally, if the DPE estimate is below the power threshold (or a second power threshold), a second count of events may be maintained. If the second count exceeds a threshold and the operating point is the reduced operating point, a return to the original operating point may be requested.

    Dynamic Voltage and Frequency Management based on Active Processors

    公开(公告)号:US20170262036A1

    公开(公告)日:2017-09-14

    申请号:US15609915

    申请日:2017-05-31

    Applicant: Apple Inc.

    Abstract: In an embodiment, a system may include multiple processors and an automatic power state controller (APSC) configured to switch the processors between various operating points. The operating points may be described by data programmed into the APSC, and the APSC may include a register that is programmable with a target operating point request identifying a target operating point for the processors from among the described operating points. The data describing the operating points may also include an indication of whether or not the number of processors that may be concurrently active at the operating point is limited. Based on the indication and the number of active processors, the APSC may override the requested operating point with a reduced operating point. In some embodiments, a digital power estimator (DPE) may monitor operation of the processors and may throttle the processors when high power consumption is detected.

    Dynamic Voltage and Frequency Management based on Active Processors
    36.
    发明申请
    Dynamic Voltage and Frequency Management based on Active Processors 审中-公开
    基于主动处理器的动态电压和频率管理

    公开(公告)号:US20160179169A1

    公开(公告)日:2016-06-23

    申请号:US15049236

    申请日:2016-02-22

    Applicant: Apple Inc.

    Abstract: In an embodiment, a system may include multiple processors and an automatic power state controller (APSC) configured to switch the processors between various operating points. The operating points may be described by data programmed into the APSC, and the APSC may include a register that is programmable with a target operating point request identifying a target operating point for the processors from among the described operating points. The data describing the operating points may also include an indication of whether or not the number of processors that may be concurrently active at the operating point is limited. Based on the indication and the number of active processors, the APSC may override the requested operating point with a reduced operating point. In some embodiments, a digital power estimator (DPE) may monitor operation of the processors and may throttle the processors when high power consumption is detected.

    Abstract translation: 在一个实施例中,系统可以包括多个处理器和配置成在各个操作点之间切换处理器的自动功率状态控制器(APSC)。 操作点可以由编程到APSC中的数据描述,并且APSC可以包括可编程的寄存器,其具有从所描述的操作点中识别处理器的目标操作点的目标操作点请求。 描述操作点的数据还可以包括在操作点处可能同时活动的处理器的数量是否受限制的指示。 基于指示和有效处理器的数量,APSC可以以减小的操作点覆盖所请求的操作点。 在一些实施例中,数字功率估计器(DPE)可以监视处理器的操作,并且可以在检测到高功耗时调节处理器。

    Dynamic voltage and frequency management based on active processors
    37.
    发明授权
    Dynamic voltage and frequency management based on active processors 有权
    基于有源处理器的动态电压和频率管理

    公开(公告)号:US09304573B2

    公开(公告)日:2016-04-05

    申请号:US13924164

    申请日:2013-06-21

    Applicant: Apple Inc.

    Abstract: In an embodiment, a system may include multiple processors and an automatic power state controller (APSC) configured to switch the processors between various operating points. The operating points may be described by data programmed into the APSC, and the APSC may include a register that is programmable with a target operating point request identifying a target operating point for the processors from among the described operating points. The data describing the operating points may also include an indication of whether or not the number of processors that may be concurrently active at the operating point is limited. Based on the indication and the number of active processors, the APSC may override the requested operating point with a reduced operating point. In some embodiments, a digital power estimator (DPE) may monitor operation of the processors and may throttle the processors when high power consumption is detected.

    Abstract translation: 在一个实施例中,系统可以包括多个处理器和配置成在各个操作点之间切换处理器的自动功率状态控制器(APSC)。 操作点可以由编程到APSC中的数据描述,并且APSC可以包括可编程的寄存器,其具有从所描述的操作点中识别处理器的目标操作点的目标操作点请求。 描述操作点的数据还可以包括在操作点处可能同时活动的处理器的数量是否受限制的指示。 基于指示和有效处理器的数量,APSC可以以减小的操作点覆盖所请求的操作点。 在一些实施例中,数字功率估计器(DPE)可以监视处理器的操作,并且可以在检测到高功耗时调节处理器。

    Digital Power Estimator to Control Processor Power Consumption
    38.
    发明申请
    Digital Power Estimator to Control Processor Power Consumption 有权
    数字功率估计器来控制处理器的功耗

    公开(公告)号:US20140380072A1

    公开(公告)日:2014-12-25

    申请号:US13924180

    申请日:2013-06-21

    Applicant: Apple Inc.

    Inventor: Jong-Suk Lee

    Abstract: In an embodiment, a digital power estimator (DPE) may be provided that may monitor the processors to estimate the amount of power being consumed. If the estimate exceeds a power threshold, the DPE may throttle one or more of the processors. Additionally, throttling events may be monitored to determine if a change in the operating point is desired. In one embodiment, the DPE throttling events may be counted, and if the counts exceed a count threshold, a change in the operating point to a reduced operation point may be requested. Additionally, if the DPE estimate is below the power threshold (or a second power threshold), a second count of events may be maintained. If the second count exceeds a threshold and the operating point is the reduced operating point, a return to the original operating point may be requested.

    Abstract translation: 在一个实施例中,可以提供数字功率估计器(DPE),其可以监视处理器以估计正在消耗的功率的量。 如果估计值超过功率阈值,DPE可以调节一个或多个处理器。 此外,可以监视节流事件以确定是否需要改变工作点。 在一个实施例中,可以对DPE节流事件进行计数,并且如果计数超过计数阈值,则可以请求对减小的操作点的操作点的改变。 另外,如果DPE估计低于功率阈值(或第二功率阈值),则可以维持事件的第二计数。 如果第二计数超过阈值,并且操作点是减小的操作点,则可以请求返回到原始操作点。

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