公开(公告)号：US11740676B2

公开(公告)日：2023-08-29

申请号：US17821394

申请日：2022-08-22

Applicant: Apple Inc.

Inventor： John H. Mylius ,  Conrad H. Ziesler ,  Daniel C. Murray ,  Jong-Suk Lee ,  Rohit Kumar

IPC: G06F1/00 ,  G06F1/3209 ,  G06F1/3296 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3287

CPC classification number: G06F1/3209 ,  G06F1/324 ,  G06F1/3206 ,  G06F1/3287 ,  G06F1/3296 ,  Y02D10/00

Abstract: An integrated circuit may include multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g., to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.

公开(公告)号：US11422606B2

公开(公告)日：2022-08-23

申请号：US17177521

申请日：2021-02-17

Applicant: Apple Inc.

Inventor： John H. Mylius ,  Conrad H. Ziesler ,  Daniel C. Murray ,  Jong-Suk Lee ,  Rohit Kumar

IPC: G06F1/00 ,  G06F1/3209 ,  G06F1/3296 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3287

Abstract: An integrated circuit includes multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g. to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.

公开(公告)号：US09606605B2

公开(公告)日：2017-03-28

申请号：US14200216

申请日：2014-03-07

Applicant: Apple Inc.

Inventor： John H. Mylius ,  Conrad H. Ziesler ,  Daniel C. Murray ,  Jong-Suk Lee ,  Rohit Kumar

IPC: G06F1/32

CPC classification number: G06F1/3209 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/171 ,  Y02D10/172

Abstract: In an embodiment, an integrated circuit includes multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g. to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.

公开(公告)号：US20150236705A1

公开(公告)日：2015-08-20

申请号：US14180976

申请日：2014-02-14

Applicant: Apple Inc.

Inventor： Jong-Suk Lee ,  Shih-Chieh R. Wen ,  Toshinari Takayanagi ,  Wei-Han Lien

IPC: H03L7/08 ,  H03K5/00

CPC classification number: H03L7/08 ,  G06F1/08 ,  G06F1/3237 ,  G06F1/324 ,  H03K5/00006 ,  H03L7/10 ,  H03L2207/10 ,  Y02D10/126 ,  Y02D10/128 ,  Y02D50/20

Abstract: A method and apparatus for achieving fast PLL lock when exiting a low power state is disclosed. In one embodiment, a method includes operating a PLL in a first state in which the PLL is locked to a first frequency. The method further includes programming the PLL to operate in a second state in which the PLL is locked to a second frequency. The programming may occur while the PLL is operating in the first state, and the PLL may continue operating in the first state after programming is complete. Thereafter, the PLL may be transitioned from the first state to a low power state. Upon exiting the low power state, the PLL may transition directly to the second state, locking to the second frequency, without having to transition to the first state or lock to the first frequency.

Abstract translation: 公开了一种在退出低功率状态时实现快速PLL锁定的方法和装置。 在一个实施例中，一种方法包括在PLL锁定到第一频率的第一状态下操作PLL。 该方法还包括对PLL进行编程以在PLL被锁定到第二频率的第二状态下工作。 当PLL处于第一状态时，可能会发生编程，并且编程完成后，PLL可能继续在第一状态下工作。 此后，PLL可以从第一状态转换到低功率状态。 在退出低功率状态时，PLL可以直接转换到第二状态，锁定到第二频率，而不必转换到第一状态或锁定到第一频率。

公开(公告)号：US20250093936A1

公开(公告)日：2025-03-20

申请号：US18970560

申请日：2024-12-05

Applicant: Apple Inc.

Inventor： John H. Mylius ,  Conrad H. Ziesler ,  Daniel C. Murray ,  Jong-Suk Lee ,  Rohit Kumar

IPC: G06F1/3209 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296

Abstract: A system include multiple components configured to operate in different modes with different power supply loads. Control circuitry may determine a first voltage margin to be included in a power supply voltage magnitude requested for the components based on current operating modes of the multiple components and detect that a first component of the multiple components has changed its operating mode. In response to the detection, the control circuitry may modify at least one parameter of the following parameters to recover a portion of the first voltage margin: a power supply voltage magnitude and an operating frequency of at least a portion of the system. A magnitude of the modification may be based on an estimated difference between a first amount of dynamic power supply voltage loss before the change in operating mode and a second amount of dynamic power supply voltage loss after the change in operating mode.

公开(公告)号：US10955893B2

公开(公告)日：2021-03-23

申请号：US16159821

申请日：2018-10-15

Applicant: Apple Inc.

Inventor： John H. Mylius ,  Conrad H. Ziesler ,  Daniel C. Murray ,  Jong-Suk Lee ,  Rohit Kumar

IPC: G06F1/32 ,  G06F1/3209 ,  G06F1/3296 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3287

Abstract: In an embodiment, an integrated circuit includes multiple instances of a component (e.g. a processor) and a control circuit. The instances may be configured to operate in various modes. Some of the modes are incapable of presenting a worst-case load on the power supply. The control circuit may be configured to monitor the instances and detect the modes in which the instances are operating. Based on the monitoring, the control circuit may request to recover a portion of the voltage margin established for worst-case conditions in the instances. If the instances are to change modes, they may be configured to request mode change from the control circuit. If the mode change causes an increase in the current supply voltage magnitude (e.g. to restore some of the recovered voltage margin), the control circuit may cause the restore and permit it to complete prior to granting the mode change.

公开(公告)号：US10410688B2

公开(公告)日：2019-09-10

申请号：US16208101

申请日：2018-12-03

Applicant: Apple Inc.

Inventor： Shih-Chieh Wen ,  Jong-Suk Lee ,  Ramesh B. Gunna

IPC: G06F12/08 ,  G11C5/14 ,  G06F1/26 ,  G06F9/28 ,  G06F1/324 ,  G06F1/3296 ,  G06F11/30 ,  G06F11/20 ,  G06F1/30 ,  G06F9/00 ,  G06F1/00

Abstract: An IC in which a power state of a circuit in one power domain is managed based at least in part on a power state of a circuit in another power domain is disclosed. In one embodiment, an IC includes first and second functional circuit blocks in first and second power domains, respectively. A third functional block shared by the first and second is also implemented in the first power domain. A power management unit may control power states of each of the first, second, and third functional circuit blocks. The power management circuit may, when the first functional circuit block is in a sleep state, set a power state of the third functional block in accordance with that of the second functional circuit block.

公开(公告)号：US20190221241A1

公开(公告)日：2019-07-18

申请号：US16208101

申请日：2018-12-03

Applicant: Apple Inc.

Inventor： Shih-Chieh Wen ,  Jong-Suk Lee ,  Ramesh B. Gunna

IPC: G11C5/14 ,  G06F1/26 ,  G06F9/28 ,  G06F1/324 ,  G06F1/3296 ,  G06F1/30 ,  G06F11/30 ,  G06F11/20

CPC classification number: G11C5/141 ,  G06F1/00 ,  G06F1/26 ,  G06F1/30 ,  G06F1/324 ,  G06F1/3296 ,  G06F9/00 ,  G06F9/28 ,  G06F11/2015 ,  G06F11/3058 ,  G11C5/148

Abstract: An IC in which a power state of a circuit in one power domain is managed based at least in part on a power state of a circuit in another power domain is disclosed. In one embodiment, an IC includes first and second functional circuit blocks in first and second power domains, respectively. A third functional block shared by the first and second is also implemented in the first power domain. A power management unit may control power states of each of the first, second, and third functional circuit blocks. The power management circuit may, when the first functional circuit block is in a sleep state, set a power state of the third functional block in accordance with that of the second functional circuit block.

公开(公告)号：US20190086942A1

公开(公告)日：2019-03-21

申请号：US15708229

申请日：2017-09-19

Applicant: Apple Inc.

Inventor： Jong-Suk Lee ,  Ramesh B. Gunna ,  Shih-Chieh Wen

IPC: G05F1/46 ,  H03K5/04

CPC classification number: G05F1/46 ,  G06F1/26 ,  H03K5/04 ,  H03K19/00346

Abstract: A method and apparatus for reducing capacitor noise in electronic systems is disclosed. A system includes at least one functional circuit block coupled to receive a variable supply voltage. The value of the supply voltage is controlled by a power management circuit. Changing a performance state of the functional circuit block includes increasing the supply voltage for higher performance, and reducing the supply voltage for reduced performance demands. The power management circuit, in changing to a higher performance state, increases the supply voltage at a first rate. A rate control circuit causes the power management circuit to reduce the supply voltage, when changing to a lower performance state, at a second rate that is less than the first rate.

公开(公告)号：US20140380071A1

公开(公告)日：2014-12-25

申请号：US13924164

申请日：2013-06-21

Applicant: Apple Inc.

Inventor： Jong-Suk Lee ,  Daniel C. Murray ,  Wei-Han Lien

IPC: G06F1/32

CPC classification number: G06F1/3206 ,  G06F1/3203 ,  G06F1/3228 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  G06F9/5094 ,  Y02D10/126 ,  Y02D10/171 ,  Y02D10/172 ,  Y02D10/22

Abstract: In an embodiment, a system may include multiple processors and an automatic power state controller (APSC) configured to switch the processors between various operating points. The operating points may be described by data programmed into the APSC, and the APSC may include a register that is programmable with a target operating point request identifying a target operating point for the processors from among the described operating points. The data describing the operating points may also include an indication of whether or not the number of processors that may be concurrently active at the operating point is limited. Based on the indication and the number of active processors, the APSC may override the requested operating point with a reduced operating point. In some embodiments, a digital power estimator (DPE) may monitor operation of the processors and may throttle the processors when high power consumption is detected.

Abstract translation: 在一个实施例中，系统可以包括多个处理器和配置成在各个操作点之间切换处理器的自动功率状态控制器（APSC）。 操作点可以由编程到APSC中的数据描述，并且APSC可以包括可编程的寄存器，其具有从所描述的操作点中识别处理器的目标操作点的目标操作点请求。 描述操作点的数据还可以包括在操作点处可能同时活动的处理器的数量是否受限制的指示。 基于指示和有效处理器的数量，APSC可以以减小的操作点覆盖所请求的操作点。 在一些实施例中，数字功率估计器（DPE）可以监视处理器的操作，并且可以在检测到高功耗时调节处理器。