公开(公告)号：US5959875A

公开(公告)日：1999-09-28

申请号：US812650

申请日：1997-03-07

Applicant: Nobuaki Kawahara ,  Kenzo Urabe ,  Changming Zhou ,  Guoliang Shou

Inventor： Nobuaki Kawahara ,  Kenzo Urabe ,  Changming Zhou ,  Guoliang Shou

IPC: G06G7/19

CPC classification number: G06G7/1921

Abstract: A signal characterizer for performing functional transformations such as Fast Fourier Transforms (FFTs), which converts an input serial analog signal into a plurality of parallel discrete signals using an analog-type serial-to-parallel converter. The discrete signals are then supplied to the input terminals of butterfly operation circuits to process the parallel discrete signals into a plurality of transformed signals. A switch supplies the transformed signals to a serial signal output terminal. The switch is controlled by a controller so that the input signal sequence is converted to a serial signal sequence according to a predetermined order.

Abstract translation: 一种用于执行诸如快速傅立叶变换（FFT）的功能变换的信号表征器，其使用模拟型串并转换器将输入的串行模拟信号转换为多个并行离散信号。 然后将离散信号提供给蝶形运算电路的输入端，以将并行离散信号处理成多个变换信号。 开关将变换的信号提供给串行信号输出端子。 开关由控制器控制，使得输入信号序列根据预定顺序被转换成串行信号序列。

公开(公告)号：US5887024A

公开(公告)日：1999-03-23

申请号：US780145

申请日：1996-12-26

Applicant: Xiaoling Qin ,  Kunihiko Suzuki ,  Guoliang Shou ,  Changming Zhou ,  Jie Chen

Inventor： Xiaoling Qin ,  Kunihiko Suzuki ,  Guoliang Shou ,  Changming Zhou ,  Jie Chen

IPC: H03H11/04 ,  H03H17/02 ,  H04B15/00 ,  H04K1/00 ,  H04L27/30

CPC classification number: H03H11/04 ,  H03H17/02

Abstract: The present invention provides a matched filter which can refresh an entire while keeping the speed of a calculation comparable to a small sized circuit. The first and second addition circuits of a matched filter of the present invention are classified into a plurality of groups, the first and second auxiliary adders replace functions for the groups of the first and second adders respectively. The outputs of the first and second adders are then inputted to the first and second subtractors, respectively, and the refreshing means appropriately refreshes the groups replaced by the first and second auxiliary adders. Further, the present invention decreases the number of auxiliary sapling and holding circuits to be used, and decides the refreshing intervals by considering the change of the voltage caused by leakage and other permissible errors of output voltage.

Abstract translation: 本发明提供了一种匹配滤波器，其可以保持与小尺寸电路相当的计算速度的整体刷新。 本发明的匹配滤波器的第一和第二加法电路分为多个组，第一和第二辅助加法器分别代替第一和第二加法器的组的功能。 然后，第一和第二加法器的输出分别输入到第一和第二减法器，并且刷新装置适当地刷新由第一和第二辅助加法器替换的组。 此外，本发明减少了要使用的辅助树苗和保持电路的数量，并且通过考虑由漏电引起的电压的变化和输出电压的其他允许误差来决定刷新间隔。

公开(公告)号：US5841315A

公开(公告)日：1998-11-24

申请号：US686958

申请日：1996-07-26

Applicant: Guoliang Shou ,  Changming Zhou ,  Kazunori Motohashi ,  Xiaoling Qin ,  Shengmin Lin ,  Makoto Yamamoto ,  Sunao Takatori

Inventor： Guoliang Shou ,  Changming Zhou ,  Kazunori Motohashi ,  Xiaoling Qin ,  Shengmin Lin ,  Makoto Yamamoto ,  Sunao Takatori

IPC: H03M1/66 ,  H03H11/04 ,  H03H17/02 ,  H03H19/00 ,  H03M3/02 ,  H03K5/00 ,  G11C27/02 ,  H03K12/00

CPC classification number: H04B1/7093 ,  H03H11/04 ,  H03H17/0254 ,  H04B1/7117

Abstract: An object of the present invention is to provide a matched filter circuit of small size and consuming low electric power. Paying attention that a spreading code is a 1 bit data string, an input signal is sampled and held as an analog signal along the time sequence, classified into "1" and "-1" and the classified signals are added in parallel by capacitive coupling in a matched filter circuit according to the present invention.

Abstract translation: 本发明的目的是提供一种尺寸小且消耗低功率的匹配滤波电路。 注意扩展码是1位数据串，输入信号被采样并保持为沿着时间序列的模拟信号，分为“1”和“-1”，分类信号通过电容耦合并联 在根据本发明的匹配滤波器电路中。

公开(公告)号：US5740096A

公开(公告)日：1998-04-14

申请号：US708986

申请日：1996-09-06

Applicant: Guoliang Shou ,  Changming Zhou ,  Makoto Yamamoto ,  Mamoru Sawahashi ,  Fumiyuki Adachi ,  Sunao Takatori

Inventor： Guoliang Shou ,  Changming Zhou ,  Makoto Yamamoto ,  Mamoru Sawahashi ,  Fumiyuki Adachi ,  Sunao Takatori

IPC: H03M1/12 ,  H03H11/04 ,  H03H17/00 ,  H03H17/02 ,  H04B1/69 ,  H04J13/00 ,  G06G7/02

CPC classification number: H03H17/0254 ,  H03H11/04 ,  H04B1/7093

Abstract: The present invention has an object to provide a filter circuit for communication generative an effective digital output as well as an analog output in a filter circuit of low electric power consumption. The function speed of an A/D converting circuit is minimized by intermittently holding an analog output signal according to an experience that peak detection can be performed by partially sampling the signal after the acquisition.

公开(公告)号：US06512785B1

公开(公告)日：2003-01-28

申请号：US09247828

申请日：1999-02-11

Applicant: Changming Zhou ,  Xuping Zhou ,  Kunihiko Suzuki ,  Xiaoxing Zhang ,  Takashi Tomatsu

Inventor： Changming Zhou ,  Xuping Zhou ,  Kunihiko Suzuki ,  Xiaoxing Zhang ,  Takashi Tomatsu

IPC: H04B1707

CPC classification number: H04B1/7093 ,  H04B2201/70707

Abstract: A matched filter bank including a plurality of matched filters and a sampling and holding units commonly used by the total matched filters. Therefore, the circuit size is diminished. An inverting amplifier for the matched filter with a variable gain includes an input capacitance, an inverting amplifier connected to an output of the input capacitance, and a plurality of feedback capacitances connected between an input and output of the inverting amplifier. A plurality of switches are connected to input side of the feedback capacitances for alternatively connecting the feedback capcitanec to the input of the inverting amplifier or a reference voltage. The feedback capacitances connected to the reference voltage are invalid with respect to a composite capacitance of the feedback capacitance and have no influence to the amplifier.

Abstract translation: 包括多个匹配滤波器的匹配滤波器组和由总匹配滤波器通常使用的采样和保持单元。 具有可变增益的匹配滤波器的反相放大器包括输入电容，连接到输入电容的输出的反相放大器和连接在输入电容的输入和输出之间的多个反馈电容 反相放大器。 多个开关连接到反馈电容的输入侧，用于将反馈capcitanec交替地连接到反相放大器的输入端或参考电压。 连接到参考电压的反馈电容相对于反馈电容的复合电容无效，并且对放大器没有影响。

公开(公告)号：US06389438B1

公开(公告)日：2002-05-14

申请号：US09256351

申请日：1999-02-24

Applicant: Changming Zhou

Inventor： Changming Zhou

IPC: G06J100

CPC classification number: H04B1/7093 ,  H03H17/0254 ,  H04B1/708 ,  H04B2201/7071

Abstract: A matched filter and signal reception apparatus having a low power consumption and small circuitry size. In the matched filter, an analog input signal is converted to digital data by an analog to digital (A/D) converter, digital multiplication, as a correlation calculation, is executed by a plurality of exclusive-OR circuits, and an addition of outputs of the exclusive-OR circuits is performed. In the digital multiplication, the digital data is multiplied by a spreading code of one bit. The outputs from the exclusive-OR circuits are added for each weight of bits, and the addition output results are weighted and summed together.

Abstract translation: 具有低功耗和小电路尺寸的匹配滤波器和信号接收装置。 在匹配滤波器中，通过模数（A / D）转换器将模拟输入信号转换为数字数据，作为相关计算的数字乘法由多个异或电路执行，并且输出的相加 的异或电路。 在数字乘法中，数字数据乘以一位的扩展码。 对于每个比特的权重，加上来自异或电路的输出，并将加法输出结果加权并相加在一起。

公开(公告)号：US06370130B1

公开(公告)日：2002-04-09

申请号：US09092914

申请日：1998-06-08

Applicant: Changming Zhou ,  Guoliang Shou ,  Xuping Zhou ,  Kunihiko Suzuki ,  Makoto Yamamoto

Inventor： Changming Zhou ,  Guoliang Shou ,  Xuping Zhou ,  Kunihiko Suzuki ,  Makoto Yamamoto

IPC: H04B7216

CPC classification number: H04B1/7077 ,  H04B1/70735 ,  H04B1/708 ,  H04B7/2628 ,  H04B2201/70702 ,  H04B2201/7071

Abstract: A receiver for spread spectrum communication system receives a traffic channel and common control channel by a plurality of matched filters at least one of which is selectively available for the traffic or the common control channel. At the initial acquisition, a plurality of matched filters are used for receiving the common control channel. At the hand-over, a plurality of matched filters are used to receive traffic channels of the current base station and the base stations in the adjacent cells.

Abstract translation: 用于扩频通信系统的接收机通过多个匹配滤波器接收业务信道和公共控制信道，其中至少一个匹配滤波器可选择地可用于业务或公共控制信道。 在初始采集时，使用多个匹配滤波器来接收公共控制信道。 在切换时，使用多个匹配滤波器来接收当前基站和相邻小区中的基站的业务信道。

公开(公告)号：US06300823B1

公开(公告)日：2001-10-09

申请号：US09257914

申请日：1999-02-26

Applicant: Changming Zhou ,  Kunihiko Suzuki ,  Takashi Tomatsu

Inventor： Changming Zhou ,  Kunihiko Suzuki ,  Takashi Tomatsu

IPC: H03K500

CPC classification number: H03H15/00

Abstract: A filter circuit comprises a plurality of sampling and holding circuits for sampling and holding analog input signal with a predetermined sampling period, a calculation circuit for multiplying each the analog input signal by a predetermined multiplier, and for summing the multiplication results. The sampling and holding circuits are controlled in an electrical power such that the electrical power is decreased when holding.

Abstract translation: 滤波器电路包括多个采样和保持电路，用于以预定采样周期对模拟输入信号进行采样和保持;计算电路，用于将每个模拟输入信号乘以预定乘法器，并将相乘结果相加。 采样和保持电路被控制在电力中，使得在保持时电力减小。

公开(公告)号：US06278724B1

公开(公告)日：2001-08-21

申请号：US09032776

申请日：1998-03-06

Applicant: Changming Zhou ,  Guoliang Shou ,  Kunihiko Suzuki ,  Xuping Zhou ,  Xiaoling Qin ,  Jie Chen ,  Mamoru Sawahashi ,  Fumiyuki Adachi

Inventor： Changming Zhou ,  Guoliang Shou ,  Kunihiko Suzuki ,  Xuping Zhou ,  Xiaoling Qin ,  Jie Chen ,  Mamoru Sawahashi ,  Fumiyuki Adachi

IPC: H04L2732

CPC classification number: H04B1/7113 ,  H04B1/7117 ,  H04B1/712 ,  H04B1/7183

Abstract: A signal reception apparatus in the spread spectrum communication system requires only a small amount of circuitry and consumes a small amount of electric power. A quadrature detector decomposes received signals into in-phase components and quadrature components, and supplies them to a complex-type matched filter. The complex-type matched filter de-spreads the in-phase components and the quadrature components and sends them to a multi-path selector. The multi-path selector selects, from among the received de-spread signals, multiple paths having high levels of signal electric powers and sends the received signals of the selected paths to multiple phase correction blocks. Analog operation circuits calculate phase errors of the received signals of two successive pilot symbol blocks for each path. An analog operation circuit corrects the phases of the received signals of the information symbol block that has been received between the two successive pilot symbol blocks. A rake combiner synchronously combines the phase-corrected de-spread received signals of each path.

Abstract translation: 扩频通信系统中的信号接收装置仅需要少量的电路并消耗少量的电力。 正交检测器将接收信号分解为同相分量和正交分量，并将其提供给复合型匹配滤波器。 复合型匹配滤波器对同相分量和正交分量进行解扩，并将它们发送到多路径选择器。 多径选择器从接收到的解扩信号中选择具有高电平信号电功率的多个路径，并将所选择的路径的接收信号发送到多个相位校正块。 模拟运算电路计算每个路径的两个连续导频符号块的接收信号的相位误差。 模拟运算电路校正在两个连续的导频符号块之间已经接收到的信息符号块的接收信号的相位。 瑞克组合器同步地组合每个路径的相位校正的去扩展接收信号。

公开(公告)号：US06212219B1

公开(公告)日：2001-04-03

申请号：US08780137

申请日：1996-12-26

Applicant: Guoliang Shou ,  Changming Zhou ,  Xuping Zhou ,  Makoto Yamamoto ,  Sunao Takatori

Inventor： Guoliang Shou ,  Changming Zhou ,  Xuping Zhou ,  Makoto Yamamoto ,  Sunao Takatori

IPC: H04L2730

CPC classification number: H04J13/0022 ,  H04J13/10 ,  H04J2013/0037

Abstract: The present invention has an object to provide a spread spectrum communication system for heightening the speed of communication. The present invention transfers the first PN code sequence itself as the first component, adds and transfers zero or more instances of the second PN code sequence given a phase difference as the second component, and defines an information for transmitting by the number of the second PN codes corresponding to a cycle of said first PN code sequence.

Abstract translation: 本发明的目的是提供一种用于提高通信速度的扩频通信系统。 本发明将第一PN码序列本身作为第一分量传送，将给定相位差的第二PN码序列的零个或多个实例相加并传送作为第二分量，并且定义用于通过第二PN 对应于所述第一PN码序列的周期的码。