Receiver in a spread spectrum communication system having low power analog multipliers and adders
    1.
    发明授权
    Receiver in a spread spectrum communication system having low power analog multipliers and adders 失效
    具有低功耗模拟乘法器和加法器的扩频通信系统中的接收机

    公开(公告)号:US06278724B1

    公开(公告)日:2001-08-21

    申请号:US09032776

    申请日:1998-03-06

    IPC分类号: H04L2732

    摘要: A signal reception apparatus in the spread spectrum communication system requires only a small amount of circuitry and consumes a small amount of electric power. A quadrature detector decomposes received signals into in-phase components and quadrature components, and supplies them to a complex-type matched filter. The complex-type matched filter de-spreads the in-phase components and the quadrature components and sends them to a multi-path selector. The multi-path selector selects, from among the received de-spread signals, multiple paths having high levels of signal electric powers and sends the received signals of the selected paths to multiple phase correction blocks. Analog operation circuits calculate phase errors of the received signals of two successive pilot symbol blocks for each path. An analog operation circuit corrects the phases of the received signals of the information symbol block that has been received between the two successive pilot symbol blocks. A rake combiner synchronously combines the phase-corrected de-spread received signals of each path.

    摘要翻译: 扩频通信系统中的信号接收装置仅需要少量的电路并消耗少量的电力。 正交检测器将接收信号分解为同相分量和正交分量,并将其提供给复合型匹配滤波器。 复合型匹配滤波器对同相分量和正交分量进行解扩,并将它们发送到多路径选择器。 多径选择器从接收到的解扩信号中选择具有高电平信号电功率的多个路径,并将所选择的路径的接收信号发送到多个相位校正块。 模拟运算电路计算每个路径的两个连续导频符号块的接收信号的相位误差。 模拟运算电路校正在两个连续的导频符号块之间已经接收到的信息符号块的接收信号的相位。 瑞克组合器同步地组合每个路径的相位校正的去扩展接收信号。

    Matched filter
    2.
    发明授权
    Matched filter 失效
    匹配过滤器

    公开(公告)号:US5887024A

    公开(公告)日:1999-03-23

    申请号:US780145

    申请日:1996-12-26

    CPC分类号: H03H11/04 H03H17/02

    摘要: The present invention provides a matched filter which can refresh an entire while keeping the speed of a calculation comparable to a small sized circuit. The first and second addition circuits of a matched filter of the present invention are classified into a plurality of groups, the first and second auxiliary adders replace functions for the groups of the first and second adders respectively. The outputs of the first and second adders are then inputted to the first and second subtractors, respectively, and the refreshing means appropriately refreshes the groups replaced by the first and second auxiliary adders. Further, the present invention decreases the number of auxiliary sapling and holding circuits to be used, and decides the refreshing intervals by considering the change of the voltage caused by leakage and other permissible errors of output voltage.

    摘要翻译: 本发明提供了一种匹配滤波器,其可以保持与小尺寸电路相当的计算速度的整体刷新。 本发明的匹配滤波器的第一和第二加法电路分为多个组,第一和第二辅助加法器分别代替第一和第二加法器的组的功能。 然后,第一和第二加法器的输出分别输入到第一和第二减法器,并且刷新装置适当地刷新由第一和第二辅助加法器替换的组。 此外,本发明减少了要使用的辅助树苗和保持电路的数量,并且通过考虑由漏电引起的电压的变化和输出电压的其他允许误差来决定刷新间隔。

    Spread spectrum communication system
    3.
    发明授权
    Spread spectrum communication system 失效
    扩频通信系统

    公开(公告)号:US06370130B1

    公开(公告)日:2002-04-09

    申请号:US09092914

    申请日:1998-06-08

    IPC分类号: H04B7216

    摘要: A receiver for spread spectrum communication system receives a traffic channel and common control channel by a plurality of matched filters at least one of which is selectively available for the traffic or the common control channel. At the initial acquisition, a plurality of matched filters are used for receiving the common control channel. At the hand-over, a plurality of matched filters are used to receive traffic channels of the current base station and the base stations in the adjacent cells.

    摘要翻译: 用于扩频通信系统的接收机通过多个匹配滤波器接收业务信道和公共控制信道,其中至少一个匹配滤波器可选择地可用于业务或公共控制信道。 在初始采集时,使用多个匹配滤波器来接收公共控制信道。 在切换时,使用多个匹配滤波器来接收当前基站和相邻小区中的基站的业务信道。

    Matched filter bank
    4.
    发明授权
    Matched filter bank 有权
    匹配滤波器组

    公开(公告)号:US06512785B1

    公开(公告)日:2003-01-28

    申请号:US09247828

    申请日:1999-02-11

    IPC分类号: H04B1707

    CPC分类号: H04B1/7093 H04B2201/70707

    摘要: A matched filter bank including a plurality of matched filters and a sampling and holding units commonly used by the total matched filters. Therefore, the circuit size is diminished. An inverting amplifier for the matched filter with a variable gain includes an input capacitance, an inverting amplifier connected to an output of the input capacitance, and a plurality of feedback capacitances connected between an input and output of the inverting amplifier. A plurality of switches are connected to input side of the feedback capacitances for alternatively connecting the feedback capcitanec to the input of the inverting amplifier or a reference voltage. The feedback capacitances connected to the reference voltage are invalid with respect to a composite capacitance of the feedback capacitance and have no influence to the amplifier.

    摘要翻译: 包括多个匹配滤波器的匹配滤波器组和由总匹配滤波器通常使用的采样和保持单元。 具有可变增益的匹配滤波器的反相放大器包括输入电容,连接到输入电容的输出的反相放大器和连接在输入电容的输入和输出之间的多个反馈电容 反相放大器。 多个开关连接到反馈电容的输入侧,用于将反馈capcitanec交替地连接到反相放大器的输入端或参考电压。 连接到参考电压的反馈电容相对于反馈电容的复合电容无效,并且对放大器没有影响。

    Filter circuit utilizing a plurality of sampling and holding circuits
    5.
    发明授权
    Filter circuit utilizing a plurality of sampling and holding circuits 有权
    利用多个取样和保持电路的滤波电路

    公开(公告)号:US06563373B1

    公开(公告)日:2003-05-13

    申请号:US09165301

    申请日:1998-10-02

    IPC分类号: H03H1502

    CPC分类号: H04B1/7093 H03H11/04

    摘要: An analog calculation circuit in a filter circuit is corrected in the calculation error by estimating the error from a calculation result of known inputs and known multiplier. A multiplier is changed according to the estimated error. The filter circuit has a voltage to current converter at an input side and a current to voltage converter at an output side and a calculation of current is performed therein.

    摘要翻译: 滤波器电路中的模拟计算电路通过从已知输入和已知乘数的计算结果估计误差来校正计算误差。 根据估计的误差改变乘数。 滤波电路在输入侧具有电压 - 电流转换器,在输出侧具有电流 - 电压转换器,并且在其中执行电流计算。

    Vector absolute--value calculation circuit
    6.
    发明授权
    Vector absolute--value calculation circuit 失效
    矢量绝对值计算电路

    公开(公告)号:US5958002A

    公开(公告)日:1999-09-28

    申请号:US905784

    申请日:1997-08-12

    CPC分类号: G06G7/22

    摘要: A highly accurate vector absolute-value calculation circuit uses analog processing and minimal hardware. Signal voltages corresponding to an I component (real number part) and a Q component (imaginary number part) are input to a first absolute-value calculation circuit 13 and a second absolute-value calculation circuit 14 through terminals 11 and 12, respectively, and they are each converted into absolute-value signals. The component I absolute-value and component Q absolute-value are compared in a comparison circuit 20. According to the result, the larger absolute-value signals are output to an input capacitor 23 of a neural computation circuit, and the smaller absolute-value signals are output to an input capacitor 24 by controlling multiplexers 21 and 22. The capacity ratio of a feedback capacitor 26 of a neural computation circuit and input capacitors 23 and 24 is 11:10:5. The complex number absolute-value calculated by the following formula is output from an output terminal 27. ##EQU1##

    摘要翻译: 高精度矢量绝对值计算电路采用模拟处理和最小硬件。 对应于I分量(实数部分)和Q分量(虚数部分)的信号电压分别通过端子11和12输入到第一绝对值计算电路13和第二绝对值计算电路14,以及 它们都被转换为绝对值信号。 在比较电路20中比较分量I绝对值和分量Q绝对值。根据结果,较大的绝对值信号被输出到神经计算电路的输入电容器23,并且较小的绝对值 通过控制多路复用器21和22将信号输出到输入电容器24.神经计算电路和输入电容器23和24的反馈电容器26的容量比为11:10:5。 从输出端子27输出由下式计算的复数绝对值。

    Matched filter circuit
    7.
    发明授权
    Matched filter circuit 有权
    匹配滤波电路

    公开(公告)号:US06625205B1

    公开(公告)日:2003-09-23

    申请号:US09332198

    申请日:1999-06-14

    IPC分类号: H04L2706

    摘要: A matched filter having a set of registers to successively store a digital voltage. The matched filter includes a cumulative shift register, a number of exclusive-or circuits, and an analog adder. The cumulative shift register has a number of stages in which each stage has one bit corresponding to the shift register. The exclusive-or circuits each perform an exclusive-or function on each bit of the digital data and the one bit coefficient while the analog adder sums outputs from the exclusive-or circuits.

    摘要翻译: 具有一组寄存器以连续存储数字电压的匹配滤波器。 匹配滤波器包括累积移位寄存器,多个异或电路和模拟加法器。 累积移位寄存器具有多个阶段,其中每个级具有对应于移位寄存器的一位。 在模拟加法器对来自异或电路的输出进行求和时,异或电路各自对数字数据的每一位和一位系数进行排他或功能。

    Analog to digital converter
    8.
    发明授权
    Analog to digital converter 失效
    模数转换器

    公开(公告)号:US06340942B1

    公开(公告)日:2002-01-22

    申请号:US09413475

    申请日:1999-10-06

    IPC分类号: H03M134

    CPC分类号: H03M1/42

    摘要: An analog to digital converter comprises a differential input portion that receives an input voltage and a reference voltage and has a first and second output terminals, a positive feedback portion connected to said first and second output terminals, a buffer if CMOSFETs connected at its input to the first output terminal, a second buffer connected at its input to the second output terminal, and a comparison circuit including a first switching portion connected between the first and second output terminals for connecting and disconnecting the first and second output terminals in response to a comparison clock signal. The comparison circuit is connected at its output to the first or second buffer. The input voltage and the reference voltage are compared when said switching portion changes from the connecting condition to the disconnecting condition in response to the comparison clock signal.

    摘要翻译: 模数转换器包括差分输入部分,其接收输入电压和参考电压,并且具有第一和第二输出端子,连接到所述第一和第二输出端子的正反馈部分,如果CMOSFET在其输入端连接到 第一输出端子,在其输入端连接到第二输出端子的第二缓冲器,以及比较电路,包括连接在第一和第二输出端子之间的第一开关部分,用于响应于比较来连接和断开第一和第二输出端子 时钟信号。 比较电路在其输出端连接到第一或第二缓冲器。 当所述切换部分响应于比较时钟信号而从连接状态变为断开状态时,比较输入电压和参考电压。

    Filter circuit
    9.
    发明授权
    Filter circuit 有权
    滤波电路

    公开(公告)号:US06300823B1

    公开(公告)日:2001-10-09

    申请号:US09257914

    申请日:1999-02-26

    IPC分类号: H03K500

    CPC分类号: H03H15/00

    摘要: A filter circuit comprises a plurality of sampling and holding circuits for sampling and holding analog input signal with a predetermined sampling period, a calculation circuit for multiplying each the analog input signal by a predetermined multiplier, and for summing the multiplication results. The sampling and holding circuits are controlled in an electrical power such that the electrical power is decreased when holding.

    摘要翻译: 滤波器电路包括多个采样和保持电路,用于以预定采样周期对模拟输入信号进行采样和保持;计算电路,用于将每个模拟输入信号乘以预定乘法器,并将相乘结果相加。 采样和保持电路被控制在电力中,使得在保持时电力减小。

    Light-emitting body, light-emitting layer, and light-emitting device
    10.
    发明授权
    Light-emitting body, light-emitting layer, and light-emitting device 有权
    发光体,发光层和发光装置

    公开(公告)号:US09203044B2

    公开(公告)日:2015-12-01

    申请号:US13370672

    申请日:2012-02-10

    IPC分类号: H01L29/20 H01L21/00 H01L51/50

    摘要: An organic light-emitting element having high efficiency and long lifetime is provided. An organic light-emitting body is provided which includes a host having a high electron-transport property (n-type host), a host having a high hole-transport property (p-type host), and a guest such as an iridium complex and in which the n-type host and the p-type host are located so as to be adjacent to each other. When an electron and a hole are injected to such a light-emitting body, the electron is trapped by the n-type host and the hole is trapped by the p-type host. Then, both the electron and the hole are injected to the guest, and thus the guest is brought into an excited state. In this process, less thermal deactivation occurs and the working rate of the guest is high; thus, highly efficient light emission can be obtained.

    摘要翻译: 提供了高效率且寿命长的有机发光元件。 提供一种有机发光体,其包括具有高电子传输性质的主体(n型主体),具有高空穴传输性质的主体(p型主体))和诸如铱络合物的客体 并且其中n型主机和p型主机位于彼此相邻的位置。 当向这种发光体注入电子和空穴时,电子被n型主体捕获,孔被p型主体捕获。 然后,将电子和孔都注入到客体中,从而使客人处于激发状态。 在这个过程中,发生较少的热失活,客人的工作速度很高; 因此,可以获得高效的发光。