公开(公告)号：US20160261276A1

公开(公告)日：2016-09-08

申请号：US14994564

申请日：2016-01-13

Applicant: DENSO CORPORATION

Inventor： Shogo KAWAHARA ,  Tomohiro NEZUKA

IPC: H03M1/66

CPC classification number: H03M1/66 ,  H03M1/08 ,  H03M1/765

Abstract: A D/A converter is configured to output tri-level potentials from an output terminal. A high potential terminal and the output terminal are connected through a p-type MOS transistor. An intermediate potential terminal and the output terminal are connected through p-type and n-type MOS transistors, which are connected in series and have low threshold voltages. A low potential terminal and the output terminal are connected through an n-type MOS transistor. The p-type MOS transistor and the n-type MOS transistor connected to the intermediate potential terminal have a positive voltage and a negative voltage between gate-source paths in off-states, respectively, and a substrate bias effect and hence remain in the off-state stably.

Abstract translation: D / A转换器被配置为从输出端子输出三电平电位。 高电位端子和输出端子通过p型MOS晶体管连接。 中间电位端子和输出端子通过串联连接并具有低阈值电压的p型和n型MOS晶体管连接。 低电位端子和输出端子通过n型MOS晶体管连接。 连接到中间电位端子的p型MOS晶体管和n型MOS晶体管分别在截止状态下的栅极 - 源极之间具有正电压和负电压以及衬底偏置效应，因此保持在截止状态 状态稳定。

公开(公告)号：US20160043733A1

公开(公告)日：2016-02-11

申请号：US14819767

申请日：2015-08-06

Applicant: DENSO CORPORATION

Inventor： Tomohiro NEZUKA

IPC: H03M3/00

CPC classification number: H03M3/368 ,  H03M1/00 ,  H03M1/12 ,  H03M3/30 ,  H03M3/43 ,  H03M3/456 ,  H03M3/464

Abstract: An A/D converter includes a delta-sigma processing circuit for A/D conversion by delta-sigma modulation, and a cyclic processing circuit for A/D conversion by cyclic processing of amplification of a residue generated in the A/D conversion. The A/D converter further includes a quantization part for outputting a quantized value of quantized output of the delta-sigma processing circuit and a quantized output of the cyclic processing circuit, and a control circuit for generating an A/D conversion result and switching over a reference voltage based on the quantized value. The delta-sigma processing circuit and the cyclic processing circuit include a sampling capacitor, an integration capacitor and a capacitive D/A converter, which includes a DAC capacitor and add and subtract a charge corresponding to a reference voltage to and from a residue of quantization. The sampling capacitor, the DAC capacitor and the integration capacitor are provided as electrically separate capacitors.

Abstract translation: A / D转换器包括用于通过Δ-Σ调制进行A / D转换的Δ-sigma处理电路和用于通过A / D转换中产生的残余物的放大的循环处理进行A / D转换的循环处理电路。 A / D转换器还包括用于输出Δ-Σ处理电路的量化输出的量化值和循环处理电路的量化输出的量化部分，以及用于产生A / D转换结果和切换的控制电路 基于量化值的参考电压。 Δ-Σ处理电路和循环处理电路包括采样电容器，积分电容器和电容性D / A转换器，其包括DAC电容器，并将与参考电压相对应的电荷加到量化残余物中 。 采样电容器，DAC电容器和积分电容器作为电气分离电容器提供。