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公开(公告)号：US20240259030A1
公开(公告)日：2024-08-01
申请号：US18391789
申请日：2023-12-21
Inventor： Shotaro WADA , Tomohiro NEZUKA , Yoshikazu FURUTA
Abstract: An analog-to-digital converter includes an input-signal chopping switch, an integrator, an output chopping switch, a quantizer, and a feedback switch. The integrator is located after the input-signal chopping switch. The integrator includes an operational amplifier, an integral capacitor, and an integral-capacitor-chopping input switch being at on an input side of the integral capacitor. The output chopping switch is on an output side of the operational amplifier. The quantizer is located after the output chopping switch. The feedback chopping switch is in a feedback path from an output of the quantizer to an input of the first integrator. The input-signal chopping switch, the integral-capacitor-chopping input switch, the output chopping switch, and the feedback chopping switch execute chopping at an identical frequency. The output chopping switch sets a polarity of an input value of the quantizer to be identical before and after the chopping.
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公开(公告)号：US20240077901A1
公开(公告)日：2024-03-07
申请号：US18459552
申请日：2023-09-01
Inventor： Masaya KONDO , Yoshikazu FURUTA , Tomohiro NEZUKA
Abstract: A reference voltage generation circuit includes a Zener diode and a current generation circuit connected to the Zener diode in parallel. The current generation circuit includes a resistance voltage divider circuit, a transistor circuit and a voltage control circuit. The resistance voltage divider circuit has a branch portion for branching the current into two paths, and outputs a reference voltage acquired by voltage division through a resistive element. The transistor circuit includes two NPN transistors and a series resistance circuit in which resistive elements are connected in series. The two NPN transistors respectively having collectors, bases and emitters. The collectors are respectively connected to the two paths. The bases have a common connection. The series resistance circuit is connected between a ground and one of the emitters. The voltage control circuit equalizes respective collector potentials of the two NPN transistors.
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公开(公告)号：US20220321387A1
公开(公告)日：2022-10-06
申请号：US17705631
申请日：2022-03-28
Applicant: DENSO CORPORATION
Inventor： Takasuke ITO , Yoshikazu FURUTA , Shigeki OTSUKA , Tomohiro NEZUKA
IPC: H04L25/02 , H04B1/04 , H03K19/0185 , H03K19/20
Abstract: A differential communication driver circuit includes a drive unit that drives differential signal lines connected via capacitors by a source current and a sink current. When a noise detection unit detects that in-phase noise is applied to the differential signal lines, a drive assisting unit maintains an amplitude of a differential signal output to the differential signal lines by increasing a current drive capability of the sink current.
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公开(公告)号：US20190310106A1
公开(公告)日：2019-10-10
申请号：US16362045
申请日：2019-03-22
Applicant: DENSO CORPORATION
Inventor： Yoshikazu FURUTA , Nobuaki MATSUDAIRA , Tomohiro NEZUKA
IPC: G01C25/00 , G01C19/567
Abstract: A gyroscope includes a MEMS sensor having a drive signal input terminal, a drive signal output terminal, and a sense signal output terminal. The gyroscope further includes a quadrature demodulator that demodulates a modulated sense signal and offset canceller circuits that cancel a direct current offset component included in an in-phase signal and a quadrature signal of the sense signal. The gyroscope has a quadrature error detector that detects a quadrature error based on the signals input from the offset canceller circuits and outputs an error signal. The gyroscope also has an IQ corrector circuit that receives the in-phase signal and the quadrature signal of the sense signal as inputs, and outputs a phase signal with a phase based on the error signal.
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公开(公告)号：US20140015550A1
公开(公告)日：2014-01-16
申请号：US13936250
申请日：2013-07-08
Applicant: DENSO CORPORATION
Inventor： Tomohiro NEZUKA
IPC: G01R27/26
CPC classification number: G01R27/2605 , G01N27/228
Abstract: A detection circuit for a capacitive sensor includes a drive signal generator for applying drive signal varying between first and second levels to a sensor common terminal, a sense amplifier having input terminals respectively connected to sensor detection terminals, and a controller for controlling input common-mode voltage of the sense amplifier to predetermined voltage. The controller includes a feedback amplifier for outputting feedback voltage according to difference between the common-mode and predetermined voltages, a pair of feedback capacitors having one ends respectively connected to the detection terminals and another ends connected together, and a voltage switcher for applying preset voltage, between the predetermined voltage and a limit voltage outputtable by the feedback amplifier in direction where the second level exists relative to the first level, to the other ends during the first level and the feedback voltage to the other ends during the second level.
Abstract translation: 一种用于电容式传感器的检测电路，包括驱动信号发生器，用于将驱动信号在第一和第二电平之间变化到传感器公共端，具有分别连接到传感器检测端的输入端的读出放大器和用于控制输入共模的控制器 读出放大器的电压到预定电压。 控制器包括反馈放大器，用于根据共模和预定电压之间的差异输出反馈电压;一对反馈电容器，其一端分别连接到检测端子，另一端连接在一起;以及电压切换器，用于施加预设电压 在所述预定电压和所述反馈放大器在所述第二电平相对于所述第一电平存在的方向上输出的限制电压之间，在所述第一电平期间的另一端和在所述第二电平期间的另一端的反馈电压之间。
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Patent Agency Ranking
公开(公告)号：US20230126107A1
公开(公告)日：2023-04-27
申请号：US17884871
申请日：2022-08-10
Inventor： Shotaro WADA , Tomohiro NEZUKA
Abstract: A clock signal generation circuit for a switched capacitor circuit with a chopping function unit includes: first and second synchronous clock circuits that generate first and second synchronous clock signals, respectively; an edge signal generation circuit that generates one or more rise and fall edge signals by delaying the first synchronous clock signal; a first clock generator that generate a first clock signal group for driving the switched capacitor circuit; and a second clock generator that generates a second clock signal group for driving the chopping function unit. Frequencies of the first and second clock signal groups are respectively defined by the first and second synchronous clock circuits. Rise and fall edges of the first and second clock signal groups are defined by the edge signal generation circuit.
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公开(公告)号：US20220103061A1
公开(公告)日：2022-03-31
申请号：US17547840
申请日：2021-12-10
Applicant: DENSO CORPORATION
Inventor： Yasuaki AOKI , Tomohiro NEZUKA , Akimasa NIWA
Abstract: In a drive circuit, a differential circuit unit is configured such that resetting of an output voltage of the differential circuit unit is carried out, and the resetting of the output voltage of the differential circuit unit is cancelled. A value of the difference between first and second divided terminal voltages at a timing of cancelling the resetting is defined as a reference voltage. The differential circuit unit generates, as the output voltage, a product of a voltage change from a reference voltage and a predetermined amplification factor after cancelling of the resetting of the differential circuit unit. A signal generator generates a gate signal for the upper- and lower-arm switches in accordance with a value of the output voltage of the differential circuit unit while the upper- and lower-arm switches are in an off state.
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8.发明申请公开(公告)号：US20190363731A1
公开(公告)日：2019-11-28
申请号：US16533849
申请日：2019-08-07
Applicant: DENSO CORPORATION
Inventor： Tomohiro NEZUKA
IPC: H03M3/00
Abstract: A ΔΣ modulator includes: an integrator having an operational amplifier and an integral capacitor; a quantizer outputting a quantization result; a D/A converter connected to a first input terminal of the operational amplifier through a first control switch, and subtracting an electric charge based on the quantization result from an electric charge stored in the integral capacitor to perform feedback of the quantization result to the integrator; a control circuit outputting a digital output value; and a sampling capacitor being connected to the first input terminal through a second control switch. The second control switch switches on and off an electrical connection between the sampling capacitor and the intermediate point between the integral capacitor and first input terminal, and plural feedbacks of the quantization results are performed per one sampling cycle.
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公开(公告)号：US20170261562A1
公开(公告)日：2017-09-14
申请号：US15278306
申请日：2016-09-28
Applicant: DENSO CORPORATION
Inventor： Kazutaka HONDA , Tomohiro NEZUKA
IPC: G01R31/36
CPC classification number: G01R31/3648 , G01R19/2509 , G01R31/362 , G01R31/3658 , G01R35/00
Abstract: An A/D conversion device acquires an inter-terminal signal of one or more battery cells when detecting a voltage across the battery cells. The A/D conversion device acquires a failure diagnosis signal during a failure diagnosis. A control unit causes the A/D conversion device to perform A/D conversion processing in a ΔΣ mode or a hybrid mode, in which acquiring remaining bits of higher bits after subjecting the higher bits to a ΔΣ type A/D conversion processing, when detecting the inter-terminal signal of the battery cells. The control unit causes the A/D conversion device to perform the A/D conversion processing in a cyclic mode or a hybrid mode, when detecting the failure diagnosis signal during the failure diagnosis.
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公开(公告)号：US20160258826A1
公开(公告)日：2016-09-08
申请号：US15048014
申请日：2016-02-19
Applicant: DENSO CORPORATION
Inventor： Tomohiro NEZUKA
CPC classification number: G01L1/2262 , G01K7/20 , G01L9/045
Abstract: A sensor driving device drives a sensor circuit formed of a Wheatstone bridge, which is connected between a main power supply for supplying a power supply potential and a reference power supply for supplying a reference potential lower than the power supply potential and includes at least one gauge resistor varying a resistance value thereof with deformation caused by external force. The sensor driving device includes a first resistor, which is connected in series with the sensor circuit between the main power supply and the sensor circuit, and a second resistor, which is connected between the sensor circuit and the reference power supply. The sensor driving device further includes a temperature output circuit connected in parallel to the sensor circuit relative to the main power supply. The temperature output circuit includes two output terminals, which output a potential difference smaller than a potential difference between one end of a main power supply side and one end of a reference power supply side.
Abstract translation: 传感器驱动装置驱动由惠斯登电桥形成的传感器电路，该电路连接在用于提供电源电位的主电源和用于提供低于电源电位的参考电位的参考电源之间，并且包括至少一个量规 电阻由外力引起的变形而改变其电阻值。 传感器驱动装置包括与主电源和传感器电路之间的传感器电路串联连接的第一电阻器和连接在传感器电路和参考电源之间的第二电阻器。 传感器驱动装置还包括相对于主电源并联连接到传感器电路的温度输出电路。 温度输出电路包括两个输出端子，其输出比主电源侧的一端和参考电源侧的一端之间的电位差小的电位差。
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