Abstract:
A process for encoding digital video signals organized in frames comprises the operations of dividing the frames into blocks starting from macroblocks subjected to motion-compensation and applying to the blocks a discrete cosine transform in such a way as to generate respective sets of coefficients. The sets of coefficients are then assembled by being organized into sets of vectors by a assembling module. Once the variance of the vectors has been detected, the vectors themselves are quantized on a number of available bits by a pyramid vector quantizer, associating to the vectors respective quantization pyramids having given sizes according to the variance detected and to the number of available bits. Finally, the vectors are encoded with respective codewords.
Abstract:
A motion estimation process in video signals organized in successive frames divided into macroblocks that is carried out by the identification of motion vectors. In a first identification phase, starting from a current motion vector, a best motion vector predictor is identified, chosen from a set of candidates. The best predictor thus identified is then subjected to a second refining phase. The aforesaid set of candidates is identified by selecting vectors belonging to macroblocks close to the current vector within the current frame and the preceding frame. Preferably, the refining phase comprises the definition of a grid of n points centered on the central position to which the best motion vector points and the distance of the points of the grid from the center is defined as a function of the matching error typically consisting of an SAD function, defined in the first identification phase. Application to the IPB and APM operating modes of the H.263+ video standard is envisaged.
Abstract:
An architecture for a pipeline processor circuit, preferably of the VLIW type, comprises a plurality of stages and a network of forwarding paths which connect pairs of said stages, as well as a register file for operand write-back. An optimization-of-power-consumption function is provided via inhibition of writing and subsequent readings in said register file of operands retrievable from said forwarding network on account of their reduced liveness length.
Abstract:
A graphic system includes a pipelined graphic engine for generating image frames for display. The pipelined graphic engine includes a geometric processing stage for performing motion extraction, and a rendering stage for generating full image frames at a first frame rate for display at a second frame rate. The second frame rate is higher than the first frame rate. A motion encoder stage receives motion information from the geometric processing stage, and produces an interpolated frame signal representative of interpolated frames. A motion compensation stage receives the interpolated frame signal from the motion encoder stage, and the full image frames from the rendering stage for generating the interpolated frames. A preferred application is in graphic systems that operate in association with smart displays through a wireless connection, such as in mobile phones.
Abstract:
A method for recognizing a progressive or an interlaced content of video pictures during their processing in a coder includes performing a number of operations on at least one of the luminance or chrominance components of the video signal. A macroblock belonging to a frame of a preceding picture is defined, and a first pair of coefficients on the selected luminance or chrominance component of the video signal is calculated. A first counter is incremented at each positive verification when one of the coefficients is greater than the other coefficient by a determined amount. A second counter is incremented at each macroblock being tested. A second pair of coefficients is calculated for each row of each Top semi-frame. A third counter is incremented at each positive verification when one of the coefficients is greater than the other coefficient by a determined amount. A fourth counter is incremented at each row tested. Verification is made as to whether a content of the first counter is greater than a content of the second counter by a determined amount, and whether, at a same time, a content of the third counter is greater than a content of the fourth counter by a determined amount. If so, then the frame composed of the Top and Bottom semi-frames of the current picture is an interlaced frame, and if not, then the frame is a progressive frame.
Abstract:
A motion estimator operating on a recursive mode reduces the number of operations per pixels required by the particular coding process being implemented. The coding process includes the MPEG standard. A method is based on the correlation existing among motion vectors associated to macroblocks in a common position in temporally adjacent images. The method is also associated to macroblocks belonging to the same picture and spatially adjacent to the current macroblock being processed. By using this double correlation, the calculation burden is reduced.
Abstract:
Relaying on a temporal correlation among successive pictures and using a hierarchical recursive motion estimation algorithm, the hardware complexity of video coders complying with the MPEG-2 standard can be significantly reduced without an appreciable loss of quality of the video images being transferred. Relaying on a temporal correlation among successive pictures is also performed on a spatial correlation of motion vectors of macroblocks of the currently processed picture.
Abstract:
A hardware accelerator for a coding system for pictures includes an array of lines and columns of pixels, and calculates the variance of macroblocks of a digitized video image for a real-time coding of the current image together with the preceding and successive images, according to the MPEG-2 video algorithm. The architecture minimizes the silicon area needed for implementing the hardware accelerator for a cost-effective reduction on the CPU of the coding system. The use of a plurality of distinct filter/demultiplexers of known architectures is eliminated by conveying the incoming pixels to the respective input lines of distinct variance calculation paths by the use of a simple counter.
Abstract:
A method of storing a data file, particularly in the MPEG format and including a flow of different frames, comprises a protection system for the data file based on a parameter stored in the data file. Advantageously, the storage method comprises selectively protecting the frames by storing parameters that are associated with corresponding different frames whose values are selected to provide a playing quality level requested by an end user. Also, a method is provided for decoding a data file, particularly of the MPEG type and including a flow of different frames, wherein the data file is stored per above.
Abstract:
The disclosure relates to a graphics module for rendering a bidimensional scene on a display screen comprising a graphics pipeline of the sort-middle type, said graphics pipeline comprising: a first processing module configured to clip a span-type input primitive received from a rasterizer module into sub-span type primitives to be associated to respective macro-blocks corresponding to portions of the screen, and to store said sub-span type primitives in a scene buffer; a second processing module configured to reconstruct the span-type input primitive starting from said sub-span type primitives, the second processing module being further intended to implement a culling operation of sub-span type primitives of the occluded type.