摘要:
An innovative method of manufacturing polishing pads using photo-curing polymers and photolithography. The photolithography enables the creation of useful surface patterns not possible with conventional machining techniques and enables the use of pad materials otherwise too soft to pattern by conventional machining techniques.
摘要:
The invention provides a polishing pad useful for polishing at least one of semiconductor, magnetic and optical substrates. The polishing pad includes a polymeric matrix, the polymeric matrix having a polishing surface. In addition, polymeric microelements are distributed within the polymeric matrix and at the polishing surface of the polymeric matrix. The polymeric microelements have an outer surface and being fluid-filled for creating texture at the polishing surface. And alkaline-earth metal oxide-containing regions are distributed within each of the polymeric microelements and spaced to coat less than 50 percent of the outer surface of the polymeric microelements.
摘要:
A chemical mechanical polishing pad comprising an acrylate polyurethane polishing layer, wherein the polishing layer exhibits a tensile modulus of 65 to 500 MPa; an elongation to break of 50 to 250%; a storage modulus, G′, of 25 to 200 MPa; a Shore D hardness of 25 to 75; and a wet cut rate of 1 to 10 μm/min.
摘要:
The polishing pad is useful for polishing at least one of magnetic, optical and semiconductor substrates. A porous polishing layer includes a dual porosity structure within a polyurethane matrix. The dual porosity structure has a primary set of pores having pore walls with a thickness of 15 to 55 μm and a storage modulus of 10 to 60 MPa measured at 25° C. In addition, pore walls contain a secondary set of pores having an average pore size of 5 to 30 μm. The porous polishing layer is either fixed to a polymeric film or sheet substrate or formed into a woven or non-woven structure to form the polishing pad.
摘要:
The polishing pad is useful for polishing at least one of magnetic, optical and semiconductor substrates. A porous polishing layer includes a dual porosity structure within a polyurethane matrix. The dual porosity structure has a primary set of pores having pore walls with a thickness of 15 to 55 μm and a storage modulus of 10 to 60 MPa measured at 25° C. In addition, pore walls contain a secondary set of pores having an average pore size of 5 to 30 μm. The porous polishing layer is either fixed to a polymeric film or sheet substrate or formed into a woven or non-woven structure to form the polishing pad.
摘要:
A polishing pad is useful planarizing semiconductor substrates. The polishing pad comprises a polymeric material having a porosity of at least 0.1 volume percent, a KEL energy loss factor at 40° C. and 1 rad/sec of 385 to 750 1/Pa and a modulus E′ at 40° C. and 1 rad/sec of 100 to 400 MPa.
摘要:
This invention describes improved polishing pads useful in the manufacture of semiconductor devices or the like. The pads of the present invention have an advantageous hydrophilic polishing material and have an innovative surface topography and texture which generally improves predictability and polishing performance.
摘要:
An improved pad and process for polishing metal damascene structures on a semiconductor wafer. The process includes the steps of pressing the wafer against the surface of a polymer sheet in combination with an aqueous-based liquid that optionally contains sub-micron particles and providing a means for relative motion of wafer and polishing pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer, wherein the polishing pad has a low elastic recovery when said load is removed, so that the mechanical response of the sheet is largely anelastic. The improved pad is characterized by a high energy dissipation coupled with a high pad stiffness. The pad exhibits a stable morphology that can be reproduced easily and consistently. The pad surface resists glazing, thereby requiring less frequent and less aggressive conditioning. The benefits of such a polishing pad are low dishing of metal features, low oxide erosion, reduced pad conditioning, longer pad life, high metal removal rates, good planarization, and lower defectivity (scratches and Light Point Defects).
摘要:
This invention describes improved polishing pads useful in the manufacture of semiconductor devices or the like. The pads of the present invention have an advantageous hydrofoil polishing material and have an innovative surface topography and texture which generally improves predictability and polishing performance.
摘要:
An improved pad and process for polishing metal damascene structures on a semiconductor wafer. The process includes the steps of pressing the wafer against the surface of a polymer sheet in combination with an aqueous-based liquid that optionally contains sub-micron particles and providing a means for relative motion of wafer and polishing pad under pressure so that the moving pressurized contact results in planar removal of the surface of said wafer, wherein the polishing pad has a low elastic recovery when said load is removed, so that the mechanical response of the sheet is largely anelastic. The improved pad is characterized by a high energy dissipation coupled with a high pad stiffness. The pad exhibits a stable morphology that can be reproduced easily and consistently. The pad surface resists glazing, thereby requiring less frequent and less aggressive conditioning. The benefits of such a polishing pad are low dishing of metal features, low oxide erosion, reduced pad conditioning, longer pad life, high metal removal rates, good planarization, and lower defectivity (scratches and Light Point Defects).