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    Devices and methods of forming unmerged epitaxy for FinFET device
    31.
    发明授权
    Devices and methods of forming unmerged epitaxy for FinFET device 有权

    公开(公告)号：US09853128B2

    公开(公告)日：2017-12-26

    申请号：US14735283

    申请日：2015-06-10

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Hui Zang ,  Bingwu Liu

    IPC: H01L29/78 ,  H01L29/66 ,  H01L21/306 ,  H01L21/3105

    CPC classification number: H01L29/66795 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/785

    Abstract: Devices and methods of growing unmerged epitaxy for fin field-effect transistor (FinFet) devices are provided. One method includes, for instance: obtaining a wafer having at least one source, at least one drain, and at least one fin; etching to expose at least a portion of the at least one fin; forming at least one sacrificial gate structure; and forming a first layer of an epitaxial growth on the at least one fin. One device includes, for instance: a wafer having at least one source, at least one drain, and at least one fin; a first layer of an epitaxial growth on the at least one fin; at least one second layer of an epitaxial growth superimposing the first layer of an epitaxial growth; and a first contact region over the at least one source and a second contact region over the at least one drain.

    Fabrication methods facilitating integration of different device architectures
    32.
    发明授权
    Fabrication methods facilitating integration of different device architectures 有权
    促进不同设备架构集成的制作方法

    公开(公告)号：US09570586B2

    公开(公告)日：2017-02-14

    申请号：US14084756

    申请日：2013-11-20

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Hong Yu ,  Seong Yeol Mun ,  Bingwu Liu ,  Lun Zhao ,  Richard J. Carter ,  Manfred Eller

    IPC: H01L29/66 ,  H01L27/088 ,  H01L29/78 ,  H01L21/8234 ,  H01L21/84 ,  H01L29/165

    CPC classification number: H01L29/66795 ,  H01L21/823431 ,  H01L21/845 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

    Abstract: Circuit fabrication methods are provided which include, for example: providing one or more gate structures disposed over a substrate structure, the substrate structure including a first region and a second region; forming a plurality of U-shaped cavities extending into the substrate structure in the first region and the second region thereof, where at least one first cavity of the plurality of U-shaped cavities is disposed adjacent in one gate structure in the first region; and expanding the at least one first cavity further into the substrate structure to at least partially undercut the one gate structure, without expanding at least one second cavity of the plurality of U-shaped cavities, where forming the plurality of U-shaped cavities facilitates fabricating the circuit structure. In one embodiment, the circuit structure includes first and second transistors, having different device architectures, the first transistor having a higher mobility characteristic than the second transistor.

    Abstract translation: 提供了电路制造方法，其包括例如：提供设置在衬底结构上方的一个或多个栅极结构，所述衬底结构包括第一区域和第二区域; 在所述第一区域和所述第二区域中形成延伸到所述衬底结构中的多个U形空腔，其中所述多个U形空腔中的至少一个第一空腔邻近所述第一区域中的一个栅极结构设置; 以及将所述至少一个第一空腔进一步扩展到所述衬底结构中以至少部分地切割所述一个栅极结构，而不扩展所述多个U形空腔中的至少一个第二空腔，其中形成所述多个U形空腔有助于制造 电路结构。 在一个实施例中，电路结构包括具有不同器件结构的第一和第二晶体管，第一晶体管具有比第二晶体管更高的迁移率特性。

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