公开(公告)号：US20210359931A1

公开(公告)日：2021-11-18

申请号：US17390373

申请日：2021-07-30

Applicant: Huawei Technologies Co., Ltd.

Inventor： Tongtong Wang ,  Xinyuan Wang

IPC: H04L12/721 ,  H04L12/717 ,  H04L12/875 ,  H04L12/865

Abstract: A network device adds an extreme low latency (ELL) service packet to an ELL queue, and adds a (time sensitive) TS service packet to a TS queue. A packet in the TS queue is sent within a time window corresponding to the TS queue, and the packet in the TS queue is not allowed to be sent within a time period beyond the time window corresponding to the TS queue. When a remaining time period obtained by subtracting a time period required by a to-be-sent TS service packet within the time window from the time window is greater than or equal to a first threshold, a packet in the ELL queue is allowed to be sent within the time window corresponding to the TS queue. The first threshold is a time period required for sending one or more ELL service packets in the ELL queue.

公开(公告)号：US20210218521A1

公开(公告)日：2021-07-15

申请号：US17168198

申请日：2021-02-05

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Zongpeng Du ,  Guoyi Chen ,  Jie Dong ,  Xinyuan Wang ,  Jun Gong

IPC: H04L5/00 ,  H04L12/723 ,  H04L12/413

Abstract: A forwarding table generation method is provided. The method includes: determining, by a forwarding device, a first timeslot set, where the first timeslot set includes multiple timeslots during which the forwarding device sends, to a first device by using a first flexible Ethernet group, multiple encoded data blocks generated by a physical coding sublayer; determining, by the forwarding device, a second timeslot set, where the second timeslot set includes multiple timeslots during which the forwarding device receives, by using a second FlexE group, the multiple encoded data blocks sent by a second device; and generating, by the forwarding device, a forwarding table, where the forwarding table includes a mapping relationship between the second FlexE group and the multiple timeslots included in the second timeslot set, and between the first FlexE group and the multiple timeslots included in the first timeslot set.

公开(公告)号：US20200067692A1

公开(公告)日：2020-02-27

申请号：US16673364

申请日：2019-11-04

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wenbin Yang ,  Tongtong Wang ,  Xinyuan Wang

IPC: H04L7/04 ,  H04J3/06 ,  H04L1/00 ,  H04L12/24

Abstract: A data processing method includes: inserting multiple alignment markers (AMs) into a first data stream, where the first data stream is a data stream that is transcoded and scrambled after being encoded at a physical layer; adaptively allocating the first data stream that includes the multiple AMs to multiple physical coding sublayer (PCS) lanes to obtain second data streams; performing forward error correction (FEC) encoding on the second data streams on the multiple PCS lanes to obtain third data streams; and delivering the third data streams to multiple physical medium attachment (PMA) sublayer lanes according to an input bit width of a serializer/deserializer (SerDes) to obtain multiple fourth data streams, each fourth data stream includes at least one complete and continuous AM, and the at least one AM is an AM in the multiple AMs.

公开(公告)号：US10291358B2

公开(公告)日：2019-05-14

申请号：US15186040

申请日：2016-06-17

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Wenbin Yang ,  Tongtong Wang ,  Xinyuan Wang

IPC: H04L1/00 ,  H03M13/29 ,  H03M13/27

Abstract: An embodiment of the present invention discloses a data sending and receiving method. A first FEC unit of a sending device sends, by using a first channel, a first data stream on which first FEC encoding has been performed; a second FEC unit of the sending device sends, by using a second channel, a second data stream on which second FEC encoding has been performed; and the sending device performs interleaving on the first data stream and the second data stream, to obtain an output data stream, and sends the output data stream to a receiving device and error correction capability of a receiving device could be improved. In addition, in the present invention, an operation of writing by row and reading by column does not need to be performed. Therefore, no delay is generated.

公开(公告)号：US20190140943A1

公开(公告)日：2019-05-09

申请号：US16240398

申请日：2019-01-04

Applicant: Huawei Technologies Co., Ltd.

Inventor： Zongpeng Du ,  Guoyi Chen ,  Jie Dong ,  Xinyuan Wang ,  Jun Gong

IPC: H04L12/741 ,  H04L12/721 ,  H04L12/715 ,  H04L12/417

Abstract: A data sending method, where the method includes receiving, by a forwarding device using a first flexible Ethernet (FlexE) group and in multiple timeslots included in a first timeslot set, multiple first encoded data blocks from a physical coding sublayer (PCS), determining, by the forwarding device according to the timeslots included in the first timeslot set and the first FlexE group, a second FlexE group and multiple timeslots included in a second timeslot set, and sending, by the forwarding device, the first encoded data blocks using the second FlexE group and in the timeslots included in the second timeslot set. The forwarding device does not need to process the first encoded data blocks in a conventional layer 2 or layer 3 forwarding mode. Therefore, a processing delay can be reduced, and a transmission delay can be reduced.

公开(公告)号：US20170310529A1

公开(公告)日：2017-10-26

申请号：US15644350

申请日：2017-07-07

Applicant: Huawei Technologies Co., Ltd.

Inventor： Wenbin Yang ,  Xinyuan Wang ,  Tongtong Wang

IPC: H04L27/38 ,  H04L25/493 ,  H04L1/00

CPC classification number: H04L27/38 ,  H04B14/023 ,  H04L1/0045 ,  H04L1/0071 ,  H04L25/4917 ,  H04L25/493

Abstract: A data processing method and an apparatus, where the method includes receiving m data streams using m receive ports respectively, where the m data streams include m×m data units, and the m×m data units form an m-order matrix A, keeping a location of one element in each row in the matrix A unchanged and moving remaining m−1 elements to remaining m−1 rows respectively in order to form an m-order matrix B, where a column number of each element in the remaining m−1 elements in the matrix A before the element is moved equals a column number of the element in the remaining m−1 elements in the matrix B after the element is moved, and sending using m transmit ports, the m×m elements in the matrix B to m different levels of a pulse amplitude modulation (PAM) circuit respectively for performing modulation.

公开(公告)号：US09514799B2

公开(公告)日：2016-12-06

申请号：US14538095

申请日：2014-11-11

Applicant: Huawei Technologies Co., Ltd.

Inventor： Xinyuan Wang ,  Haoyu Song

IPC: G06F12/00 ,  G06F13/00 ,  G11C11/406 ,  G06F13/16

CPC classification number: G11C11/40615 ,  G06F13/1689

Abstract: In a memory scheduling method, a memory controller writes a first group of first row strobe commands (ACTs) into a first memory. The first group of first ACTs includes multiple first ACTs and a periodic interval exists between two adjacent first ACTs written by the memory controller into the first memory. The memory controller writes operation commands that correspond to the first group of first ACTs into the first memory after writing the first group of first ACTs into the first memory. The memory controller writes second ACTs into a second memory in periodic intervals for writing the first group of first ACTs into the first memory and/or in periodic intervals for writing the operation commands that correspond to the first group of first ACTs. The memory controller writes operation commands that correspond to the second ACTs into the second memory.

Abstract translation: 在存储器调度方法中，存储器控制器将第一组第一行选通命令（ACT）写入第一存储器。 第一组第一ACT包括多个第一ACT，并且在由存储器控制器写入第一存储器的两个相邻的第一ACT之间存在周期性间隔。 存储器控制器将第一组第一ACT写入第一存储器之后，将与第一组第一ACT对应的操作命令写入第一存储器。 存储器控制器以周期性间隔将第二ACT写入第二存储器，以将第一组第一ACT写入第一存储器和/或以周期性间隔写入与第一组ACT相对应的操作命令。 存储器控制器将对应于第二ACT的操作命令写入第二存储器。

公开(公告)号：US20240388417A1

公开(公告)日：2024-11-21

申请号：US18787001

申请日：2024-07-29

Applicant: Huawei Technologies Co., Ltd.

Inventor： Hao Ren ,  Xiang He ,  Xinyuan Wang

IPC: H04L7/04 ,  H04L7/10

Abstract: This application provides a codeword synchronization method, a communication device, a chip, and a chip system, and pertains to the field of communication technologies. The method includes: entering a synchronization position determining state in response to a start signal; determining a synchronization position in a received data sequence in the synchronization position determining state, where the synchronization position indicates a start position of a codeword in the data sequence; entering a loss-of-lock detection state in response to determining the synchronization position; and verifying, in the loss-of-lock detection state, a plurality of codewords selected based on the synchronization position, and re-entering the synchronization position determining state in response to a verification failure. According to the solutions of this application, codeword synchronization can be continuously implemented without inserting an additional alignment marker, thereby saving transmission resources.

公开(公告)号：US20240275574A1

公开(公告)日：2024-08-15

申请号：US18649513

申请日：2024-04-29

Applicant: Huawei Technologies Co., Ltd.

Inventor： Xiang He ,  Xinyuan Wang ,  Hao Ren

IPC: H04L7/02 ,  H04L1/00

CPC classification number: H04L7/02 ,  H04L1/0041 ,  H04L1/0071

Abstract: This application discloses a data transmission method, apparatus, device, and system. The data transmission method includes: A first module obtains at least one channel of first data encoded based on first FEC; converts the at least one channel of first data to obtain at least one channel of second data, where a sum of rates of the at least one channel of second data is not less than a sum of rates of the at least one channel of first data; and transmits the obtained at least one channel of second data. In the method, the at least one channel of first data is converted to obtain the at least one channel of second data whose sum of rates is not less than the sum of rates of the at least one channel of first data.

公开(公告)号：US11824636B2

公开(公告)日：2023-11-21

申请号：US17833862

申请日：2022-06-06

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Xiang He ,  Yunlei Qi ,  Jingfeng Chen ,  Tao Lin ,  Junmin Song ,  Xinyuan Wang

IPC: H04J3/06 ,  H03M9/00 ,  H04J3/16 ,  H04L69/323

CPC classification number: H04J3/0667 ,  H03M9/00 ,  H04J3/0632 ,  H04J3/0688 ,  H04J3/1658 ,  H04L69/323

Abstract: This disclosure provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.