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    Semiconductor storage device
    31.
    发明授权
    Semiconductor storage device 有权
    半导体存储设备

    公开(公告)号：US09229863B2

    公开(公告)日：2016-01-05

    申请号：US13462905

    申请日：2012-05-03

    申请人： Eiji Yoshihashi ,  Hirokuni Yano ,  Shinji Yonezawa

    发明人： Eiji Yoshihashi ,  Hirokuni Yano ,  Shinji Yonezawa

    IPC分类号： G06F12/00 ,  G06F12/08

    CPC分类号： G06F12/0804 ,  G06F12/0246 ,  G06F12/0866 ,  G06F2212/214 ,  G06F2212/7201 ,  G06F2212/7205

    摘要： According to the embodiments, a first storage area and a second storage area specified by a trim request is managed by a first management unit, and the second storage area specified by the trim request is managed by a second management unit. A block in which data of the first management unit are all specified by the trim request from the first or second storage areas and a block in which data of the second management unit are all specified by the trim request from the second storage area are released.

    摘要翻译： 根据实施例，由修剪请求指定的第一存储区域和第二存储区域由第一管理单元管理，并且由修剪请求指定的第二存储区域由第二管理单元管理。 其中第一管理单元的数据全部由来自第一或第二存储区域的修剪请求指定的块和第二管理单元的数据全部由来自第二存储区域的修剪请求指定的块被释放。

    Memory system
    33.
    发明授权
    Memory system 失效
    内存系统

    公开(公告)号：US08745443B2

    公开(公告)日：2014-06-03

    申请号：US13326872

    申请日：2011-12-15

    申请人： Takashi Hirao ,  Mitsunori Tadokoro ,  Hirokuni Yano

    发明人： Takashi Hirao ,  Mitsunori Tadokoro ,  Hirokuni Yano

    IPC分类号： G06F11/00

    CPC分类号： G06F11/1441

    摘要： According to one embodiment, a memory system includes a data manager and a data restorer. The data manager multiplexes difference logs by a parallel writing operation and stores them in a second storage area, the difference logs being difference logs indicating difference information before and after update of a management table; and thereafter multiplexes predetermined data as finalizing logs and stores them in the second storage area. The data restorer determines a system status at startup of the memory system, by judging whether irregular power-off occurs or data destruction occurs in the second storage area, based on a data storage state of the difference logs and the finalizing logs stored in the second storage area.

    摘要翻译： 根据一个实施例，存储器系统包括数据管理器和数据恢复器。 数据管理器通过并行写入操作来复用差异日志，并将它们存储在第二存储区域中，差异日志是指示更新管理表之前和之后的差异信息的差异日志; 然后将预定数据多路复用为完成日志并将它们存储在第二存储区域中。 数据恢复器通过基于存储在第二存储区域中的不同日志的数据存储状态和存储的完成日志来判断在启动存储器系统时的系统状态，通过判断是否发生不规则的电源关闭或在第二存储区域中发生数据破坏 储藏区域。

    MEMORY SYSTEM
    34.
    发明申请
    MEMORY SYSTEM 有权
    记忆系统

    公开(公告)号：US20110231610A1

    公开(公告)日：2011-09-22

    申请号：US12884844

    申请日：2010-09-17

    申请人： Hirokuni Yano ,  Hiroshi Yao ,  Hajime Yamazaki ,  Tatsuya Sumiyoshi ,  Yoshimi Niisato ,  Takahiro Totsuka

    发明人： Hirokuni Yano ,  Hiroshi Yao ,  Hajime Yamazaki ,  Tatsuya Sumiyoshi ,  Yoshimi Niisato ,  Takahiro Totsuka

    IPC分类号： G06F12/00 ,  G06F12/08

    CPC分类号： G06F12/0246 ,  G06F12/0804 ,  G06F2212/7205

    摘要： According to one embodiment, a free blocks included in a nonvolatile semiconductor memory are classified into a plurality of free block management lists. When a free block is acquired at normal priority, the free block is acquired from the free block management list in which a number of free blocks is larger than a first threshold. When a free block is acquired at high priority, the free block is acquired from the free block management list irrespective of the first threshold.

    摘要翻译： 根据一个实施例，包括在非易失性半导体存储器中的自由块被分类为多个空闲块管理列表。 当以正常优先级获取空闲块时，从多个空闲块大于第一阈值的空闲块管理列表中获取空闲块。 当以高优先级获取空闲块时，从空闲块管理列表获取空闲块，而与第一阈值无关。

    Process migration method computer and system
    35.
    发明授权
    Process migration method computer and system 有权
    过程迁移方法计算机和系统

    公开(公告)号：US07779084B2

    公开(公告)日：2010-08-17

    申请号：US11943005

    申请日：2007-11-20

    申请人： Seiji Maeda ,  Kiyoko Sato ,  Nobuo Sakiyama ,  Hirokuni Yano ,  Takuya Hayashi

    发明人： Seiji Maeda ,  Kiyoko Sato ,  Nobuo Sakiyama ,  Hirokuni Yano ,  Takuya Hayashi

    IPC分类号： G06F15/16

    CPC分类号： G06F9/4862

    摘要： Process migration method includes copying first process context indicative of first processing, transmitting process context to second computer, causing first computer to start generation of first execution record, causing second computer to receive process context, determining, from first execution record, whether first processing should be migrated, if it is determined that first processing should postpone being migrated, finishing generation of first execution record, starting generation of second execution record, transmitting first execution record to second computer, reproducing process context, and determining, from second execution record, whether first processing should be migrated, after reproducing of process context is finished in the second computer.

    摘要翻译： 过程迁移方法包括复制指示第一处理的第一处理上下文，将处理上下文传送给第二计算机，使第一计算机开始生成第一执行记录，使第二计算机接收进程上下文，从第一执行记录确定第一处理是否应当 如果确定第一处理被推迟被迁移，则完成第一执行记录的生成，开始生成第二执行记录，将第一执行记录发送到第二计算机，再现处理环境，以及从第二执行记录确定是否 在第二台计算机中完成处理上下文的再现之后，应该首先进行处理。

    MEMORY SYSTEM AND METHOD OF CONTROLLING MEMORY SYSTEM
    36.
    发明申请
    MEMORY SYSTEM AND METHOD OF CONTROLLING MEMORY SYSTEM 有权
    存储器系统和控制存储器系统的方法

    公开(公告)号：US20100169551A1

    公开(公告)日：2010-07-01

    申请号：US12563856

    申请日：2009-09-21

    申请人： Hirokuni Yano ,  Toshikatsu Hida

    发明人： Hirokuni Yano ,  Toshikatsu Hida

    IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F12/10

    CPC分类号： G06F12/0246 ,  G06F2212/7201

    摘要： A forward lookup address translation table and a reverse lookup address translation table stored in a nonvolatile second storing unit are transferred as a master table to a volatile first storing unit at a time of start-up. When an event occurs so that the master table needs to be updated, difference information before and after update of any one of the forward lookup address translation table and the reverse lookup address translation table is recorded in the first storing unit as a log, thereby reducing an amount of the log.

    摘要翻译： 存储在非易失性第二存储单元中的正向查找地址转换表和反向查找地址转换表在启动时被作为主表传送到易失性第一存储单元。 当发生事件以使主表需要更新时，在正向查找地址转换表和反向查找地址转换表中的任何一个更新之前和之后的差异信息作为日志记录在第一存储单元中，从而减少 一定量的日志。

    Memory system with read and write caches and method of controlling memory system with read and write caches
    38.
    发明授权
    Memory system with read and write caches and method of controlling memory system with read and write caches 有权
    具有读和写高速缓存的内存系统和使用读写缓存控制内存系统的方法

    公开(公告)号：US09141549B2

    公开(公告)日：2015-09-22

    申请号：US12542222

    申请日：2009-08-17

    申请人： Hirokuni Yano ,  Naoki Otsuka

    发明人： Hirokuni Yano ,  Naoki Otsuka

    IPC分类号： G06F12/08

    CPC分类号： G06F12/0862 ,  G06F12/0868 ,  G06F2212/214 ,  G06F2212/222 ,  G06F2212/6028

    摘要： A controller sets, out of a data range that is specified in a read request from a host device, a predetermined size of a first data range that follows a top portion of the data range and a predetermined size of a second data range that follows the first data range, and after transfer, to the host device, of data corresponding to the first data range from a second storage unit or a third storage unit having smaller data output latency than the first storage unit in which read/write of data is performed is started, the controller searches for data corresponding to the second data range in the second storage unit or the third storage unit.

    摘要翻译： A控制器在从主机设备的读取请求中指定的数据范围内设置遵循该数据范围的顶部部分的第一数据范围的预定大小和在该数据范围之后的第二数据范围的预定大小 第一数据范围，并且在从具有比执行数据的读/写数据的第一存储单元的数据输出延迟更小的第二存储单元或第三存储单元传送对应于第一数据范围的数据的主机设备之后 控制器在第二存储单元或第三存储单元中搜索对应于第二数据范围的数据。

    Method and system for performing real-time operation including plural chained tasks using plural processors
    39.
    发明授权
    Method and system for performing real-time operation including plural chained tasks using plural processors 失效
    用于使用多个处理器执行包括多个链接任务的实时操作的方法和系统

    公开(公告)号：US08495651B2

    公开(公告)日：2013-07-23

    申请号：US10895040

    申请日：2004-07-21

    申请人： Tatsunori Kanai ,  Seiji Maeda ,  Hirokuni Yano ,  Kenichiro Yoshii

    发明人： Tatsunori Kanai ,  Seiji Maeda ,  Hirokuni Yano ,  Kenichiro Yoshii

    IPC分类号： G06F9/46

    CPC分类号： G06F9/45537 ,  G06F9/4887 ,  G06F9/5066

    摘要： An information processing system periodically performs a real-time operation including a plurality of chained tasks. The system includes a plurality of processors, a unit for dividing the chained tasks into a first task group and a second task group based on a relationship in order of execution among the tasks, the second task group being executed after the first task group, and a unit for performing a scheduling operation of periodically assigning each of the first task group and the second task group to at least one of the processors to periodically execute the first task group at regular time intervals and periodically execute the second task group at the regular time intervals with a one-period delay relative to the first task group.

    摘要翻译： 信息处理系统周期性地执行包括多个链接任务的实时操作。 该系统包括多个处理器，用于基于在任务之间的执行顺序的关系将链接任务划分为第一任务组和第二任务组的单元，在第一任务组之后执行的第二任务组，以及 用于执行将所述第一任务组和所述第二任务组中的每一个周期性地分配给所述处理器中的至少一个的调度操作的单元，以定期的时间间隔周期性地执行所述第一任务组，并且以规则时间周期性地执行所述第二任务组 间隔相对于第一个任务组具有一个周期的延迟。

    Method and system for performing real-time operation
    40.
    发明授权
    Method and system for performing real-time operation 有权
    执行实时操作的方法和系统

    公开(公告)号：US08171477B2

    公开(公告)日：2012-05-01

    申请号：US12172285

    申请日：2008-07-14

    申请人： Tatsunori Kanai ,  Seiji Maeda ,  Kenichiro Yoshii ,  Hirokuni Yano

    发明人： Tatsunori Kanai ,  Seiji Maeda ,  Kenichiro Yoshii ,  Hirokuni Yano

    IPC分类号： G06F9/46

    CPC分类号： G06F9/4881 ,  G06F9/5066

    摘要： An information processing system performs a real-time operation including a combination of a plurality of tasks. The system includes a plurality of processors, a unit which stores structural description information and a plurality of programs describing procedures corresponding to the tasks, the structural description information indicating a relationship in input/output between the programs and including cost information concerning time required for executing each of the programs, a unit which determines an execution start timing and execution term of each of a plurality of threads for execution of the programs based on the structural description information, and a unit which performs a scheduling operation of assigning the threads to at least one of the processors according to a result of the determining.

    摘要翻译： 信息处理系统执行包括多个任务的组合的实时操作。 该系统包括多个处理器，存储结构描述信息的单元和描述与任务相对应的过程的多个程序，表示程序之间的输入/输出中的关系的结构性描述信息，并且包括关于执行所需时间的成本信息 每个程序，基于结构描述信息确定用于执行程序的多个线程中的每一个的执行开始时间和执行项的单元，以及执行将线程分配至少的调度操作的单元 根据确定的结果，处理器中的一个。