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31.发明授权公开(公告)号：US10396185B2
公开(公告)日：2019-08-27
申请号：US15635890
申请日：2017-06-28
发明人： Bruce B. Doris , Hong He , Nicolas J. Loubet , Junli Wang
IPC分类号： H01L29/66 , H01L29/78 , H01L27/092 , H01L29/10 , H01L29/165 , H01L29/423 , H01L21/265 , H01L21/8238
摘要： A method of forming a finFET transistor device includes forming a crystalline, compressive strained silicon germanium (cSiGe) layer over a substrate; masking a first region of the cSiGe layer so as to expose a second region of the cSiGe layer; subjecting the exposed second region of the cSiGe layer to an implant process so as to amorphize a bottom portion thereof and transform the cSiGe layer in the second region to a relaxed SiGe (rSiGe) layer; performing an annealing process so as to recrystallize the rSiGe layer; epitaxially growing a tensile strained silicon layer on the rSiGe layer; and patterning fin structures in the tensile strained silicon layer and in the first region of the cSiGe layer.
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公开(公告)号：US10396144B2
公开(公告)日：2019-08-27
申请号：US15494871
申请日：2017-04-24
摘要： Provided is an inductor structure. In embodiments of the invention, the inductor structure includes a first laminated stack. The first laminated stack includes layers of an insulating material alternating with layers of a first magnetic material. The inductor structure includes a laminated second stack formed on the first laminated stack. The second laminated stack includes layers of the insulating material alternating with layers of a second magnetic material. The second magnetic material has a greater permeability than does the first magnetic material.
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公开(公告)号：US10355070B2
公开(公告)日：2019-07-16
申请号：US15966202
申请日：2018-04-30
摘要： Provided is an inductor structure. In embodiments of the invention, the inductor structure includes a first laminated stack. The first laminated stack includes layers of an insulating material alternating with layers of a first magnetic material. The inductor structure includes a laminated second stack formed on the first laminated stack. The second laminated stack includes layers of the insulating material alternating with layers of a second magnetic material. The second magnetic material has a greater permeability than does the first magnetic material.
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34.发明申请公开(公告)号：US20190198243A1
公开(公告)日：2019-06-27
申请号：US16291795
申请日：2019-03-04
CPC分类号： H01F17/04 , H01F17/0033 , H01F41/14 , H01F41/34 , H01F2017/0066
摘要： A magnetic material stack comprises a first dielectric layer, a first magnetic material layer on the first dielectric layer, at least a second dielectric layer on the first magnetic material layer and at least a second magnetic material layer on the second dielectric layer. One or more surfaces of the layers are smoothed to remove at least a portion of surface roughness on the respective layers
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公开(公告)号：US10283249B2
公开(公告)日：2019-05-07
申请号：US15281466
申请日：2016-09-30
摘要： A method for fabricating a magnetic material stack on a substrate includes the following steps. A first dielectric layer is formed. A first magnetic material layer is formed on the first dielectric layer. At least a second dielectric layer is formed on the first magnetic material layer. At least a second magnetic material layer is formed on the second dielectric layer. During one or more of the forming steps, a surface smoothing operation is performed to remove at least a portion of surface roughness on the layer being formed. The magnetic material stack can be used to form a low magnetic loss yoke inductor.
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公开(公告)号：US10170537B2
公开(公告)日：2019-01-01
申请号：US14581043
申请日：2014-12-23
摘要： A semiconductor device is provided that includes a pedestal of an insulating material present over at least one layer of a semiconductor material, and at least one fin structure in contact with the pedestal of the insulating material. Source and drain region structures are present on opposing sides of the at least one fin structure. At least one of the source and drain region structures includes at least two epitaxial material layers. A first epitaxial material layer is in contact with the at least one layer of semiconductor material. A second epitaxial material layer is in contact with the at least one fin structure. The first epitaxial material layer is separated from the at least one fin structure by the second epitaxial material layer. A gate structure present on the at least one fin structure.
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37.发明申请公开(公告)号：US20180337678A1
公开(公告)日：2018-11-22
申请号：US15897924
申请日：2018-02-15
发明人： Bruce B. Doris , Rajiv V. Joshi , Naigang Wang
IPC分类号： H03K19/00 , H03K19/0175 , H01L21/8238 , H01L23/528 , H01L49/02 , H01L27/092
CPC分类号： H03K19/0013 , H01L21/823821 , H01L23/5286 , H01L27/0924 , H01L28/10 , H01L28/40 , H03K19/017509
摘要： Circuits and methods are provided. The circuits and methods are for providing a supply voltage to a dynamic internal power supply node of a group of other circuits. A circuit includes a first transistor and a second transistor, of different channel types, coupled in parallel to a static power supply that supplies a constant power supply voltage. The circuit further includes a magnetic inductor having a first terminal connected to a common node between the first transistor and the second transistor and a second terminal connected to the dynamic internal power supply node, to supply the dynamic internal power supply node with a boosted voltage having a magnitude greater than a magnitude of the constant power supply voltage by resonating with at least one capacitance coupled to the dynamic internal power supply node.
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38.发明申请公开(公告)号：US20180337677A1
公开(公告)日：2018-11-22
申请号：US15897837
申请日：2018-02-15
发明人： Bruce B. Doris , Rajiv V. Joshi , Naigang Wang
IPC分类号： H03K19/00 , H03K19/0175 , H01L21/8238 , H01L23/528 , H01L49/02 , H01L27/092
CPC分类号： H03K19/0013 , H01L21/823821 , H01L23/5286 , H01L27/0924 , H01L28/10 , H01L28/40 , H03K19/017509
摘要： Circuits and methods are provided. The circuits and methods are for providing a supply voltage to a dynamic internal power supply node of a group of other circuits. A circuit includes a first transistor and a second transistor, of different channel types, coupled in parallel to a static power supply that supplies a constant power supply voltage. The circuit further includes a magnetic inductor having a first terminal connected to a common node between the first transistor and the second transistor and a second terminal connected to the dynamic internal power supply node, to supply the dynamic internal power supply node with a boosted voltage having a magnitude greater than a magnitude of the constant power supply voltage by resonating with at least one capacitance coupled to the dynamic internal power supply node.
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公开(公告)号：US10121852B2
公开(公告)日：2018-11-06
申请号：US15794616
申请日：2017-10-26
发明人： Bruce B. Doris , Hong He , Sivananda K. Kanakasabapathy , Gauri Karve , Fee Li Lie , Derrick Liu , Soon-Cheon Seo , Stuart A. Sieg
摘要： A semiconductor structure is provided that includes a semiconductor fin portion having an end wall and extending upward from a substrate. A gate structure straddles a portion of the semiconductor fin portion. A first set of gate spacers is located on opposing sidewall surfaces of the gate structure; and a second set of gate spacers is located on sidewalls of the first set of gate spacers. One gate spacer of the second set of gate spacers has a lower portion that directly contacts the end wall of the semiconductor fin portion.
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公开(公告)号：US20180286582A1
公开(公告)日：2018-10-04
申请号：US15476147
申请日：2017-03-31
摘要： Embodiments are directed to a method of forming a laminated magnetic inductor and resulting structures having anisotropic magnetic layers. A first magnetic stack is formed having one or more magnetic layers alternating with one or more insulating layers. A trench is formed in the first magnetic stack oriented such that an axis of the trench is perpendicular to a hard axis of the magnetic inductor. The trench is filled with a dielectric material.
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